HT49C50L datasheet(13/45 Pages) HOLTEK

13 / 45 page

HT49R50A-1/HT49C50-1/HT49C50L

Rev. 2.00

November 29, 2005

The Timer/Event Counter 0 interrupt request flag (T0F),

external interrupt 1 request flag (EIF1), external inter-

rupt 0 request flag (EIF0), enable Timer/Event Counter

0 interrupt bit (ET0I), enable external interrupt 1 bit

(EEI1), enable external interrupt 0 bit (EEI0), and en-

able master interrupt bit (EMI) make up of the Interrupt

Control register 0 (INTC0) which is located at 0BH in the

RAM. The real time clock interrupt request flag (RTF),

time base interrupt request flag (TBF), Timer/Event

Counter 1 interrupt request flag (T1F), enable real time

clock interrupt bit (ERTI), and enable time base interrupt

bit (ETBI), enable Timer/Event Counter 1 interrupt bit

(ET1I) on the other hand, constitute the Interrupt Control

EMI, EEI0, EEI1, ET0I, ET1I, ETBI, and ERTI are all

used to control the enable/disable status of interrupts.

These bits prevent the requested interrupt from being

serviced. Once the interrupt request flags (RTF, TBF, T0F,

T1F, EIF1, EIF0) are all set, they remain in the INTC1 or

INTC0 respectively until the interrupts are serviced or

cleared by a software instruction.

It is recommended that a program not use the

²CALL

subroutine

² within the interrupt subroutine. It¢s because

interrupts often occur in an unpredictable manner or re-

quire to be serviced immediately in some applications.

At this time, if only one stack is left, and enabling the in-

terrupt is not well controlled, operation of the

²call² in the

interrupt subroutine may damage the original control se-

quence.

Oscillator Configuration

These devices provide three oscillator circuits for sys-

tem clocks, i.e., RC oscillator and crystal oscillator, de-

termined by option. No matter what type of oscillator is

selected, the signal is used for the system clock. The

HALT mode stops the system oscillator and ignores ex-

ternal signal to conserve power.

Of the three oscillators, if the RC oscillator is used, an

external resistor between OSC1 and VSS is required,

and the range of the resistance should be from 30k

W to

750k

W for HT49R50A-1/HT49C50-1 and from 560kW to

W for HT49C50L. The system clock, divided by 4, is

available on OSC2 with pull-high resistor, which can be

used to synchronize external logic. The RC oscillator

provides the most cost effective solution. However, the

frequency of the oscillation may vary with VDD, temper-

ature, and the chip itself due to process variations. It is

therefore, not suitable for timing sensitive operations

where accurate oscillator frequency is desired.

On the other hand, if the crystal oscillator is selected, a

crystal across OSC1 and OSC2 is needed to provide the

feedback and phase shift required for the oscillator, and

no other external components are required. A resonator

may be connected between OSC1 and OSC2 to replace

the crystal and to get a frequency reference, but two ex-

ternal capacitors in OSC1 and OSC2 are required.

There is another oscillator circuit designed for the real

time clock. In this case, only the 32.768kHz crystal oscil-

lator can be applied. The crystal should be connected

between OSC3 and OSC4, and two external capacitors

along with one external resistor are required for the os-

cillator circuit in order to get a stable frequency.

The RTC oscillator circuit can be controlled to oscillate

quickly by setting the

²QOSC² bit (bit 4 of RTCC). It is

recommended to turn on the quick oscillating function

upon power on, and turn it off after 2 seconds.

The WDT oscillator is a free running on-chip RC oscilla-

tor, and no external components are required. Although

the system enters the power down mode, the system

clock stops, and the WDT oscillator still works with a pe-

riod of approximately 65

ms@5V. The WDT oscillator can

be disabled by option to conserve power.

Watchdog Timer

- WDT

The WDT clock source is implemented by a dedicated

RC oscillator (WDT oscillator) or an instruction clock

(system clock/4) or a real time clock oscillator (RTC os-

cillator). The timer is designed to prevent a software

malfunction or sequence from jumping to an unknown

location with unpredictable results. The WDT can be

disabled by option. But if the WDT is disabled, all execu-

tions related to the WDT lead to no operation.

The WDT time-out period is as fS/2

16~f

S/2

15.

If the WDT clock source chooses the internal WDT oscilla-

tor, the time-out period may vary with temperature, VDD,

and process variations. On the other hand, if the clock

source selects the instruction clock and the

²HALT² in-

struction is executed, WDT may stop counting and lose its

protecting purpose, and the logic can only be restarted by

an external logic.

C r y s t a l O s c i l l a t o r

R C O s c i l l a t o r

O S C 1

O S C 2

O S C 1

O S C 2

f S Y S / 4

V D D

System Oscillator

O S C 3

O S C 4

32768Hz Crystal/RTC Oscillator

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