 |
Electronic Components Datasheet Search |
|
|
Electronic Components Datasheet Search |
|
ISC0602NLS Datasheet(PDF) 4 Page - Infineon Technologies AG |
|
|
|||||||||||||||||||||||||||||
ISC0602NLS Datasheet(HTML) 4 Page - Infineon Technologies AG |
|
|
4 / 11 page  4 OptiMOSTM5Power-Transistor,80V ISC0602NLS Rev.2.1,2021-04-01 Final Data Sheet 3Electricalcharacteristics atTj=25°C,unlessotherwisespecified Table4Staticcharacteristics Values Min. Typ. Max. Parameter Symbol Unit Note/TestCondition Drain-source breakdown voltage V(BR)DSS 80 - - V VGS=0V,ID=1mA Gate threshold voltage VGS(th) 1.1 1.6 2.3 V VDS=VGS,ID=29µA Zero gate voltage drain current IDSS - - 0.1 10 1 100 µA VDS=80V,VGS=0V,Tj=25°C VDS=80V,VGS=0V,Tj=125°C Gate-source leakage current IGSS - 10 100 nA VGS=20V,VDS=0V Drain-source on-state resistance RDS(on) - - 7.1 9.2 7.3 9.5 m Ω VGS=10V,ID=20A VGS=4.5V,ID=10A Gate resistance 1) RG - 1.2 - Ω - Transconductance gfs - 47 - S |VDS| ≥2|ID|RDS(on)max,ID=20A Table5Dynamiccharacteristics Values Min. Typ. Max. Parameter Symbol Unit Note/TestCondition Input capacitance 1) Ciss - 1400 1800 pF VGS=0V,VDS=40V,f=1MHz Output capacitance 1) Coss - 220 290 pF VGS=0V,VDS=40V,f=1MHz Reverse transfer capacitance 1) Crss - 10 17 pF VGS=0V,VDS=40V,f=1MHz Turn-on delay time td(on) - 5.4 - ns VDD=40V,VGS=4.5V,ID=20A, RG,ext=3 Ω Rise time tr - 20 - ns VDD=40V,VGS=4.5V,ID=20A, RG,ext=3 Ω Turn-off delay time td(off) - 13 - ns VDD=40V,VGS=4.5V,ID=20A, RG,ext=3 Ω Fall time tf - 3.7 - ns VDD=40V,VGS=4.5V,ID=20A, RG,ext=3 Ω Table6Gatechargecharacteristics2) Values Min. Typ. Max. Parameter Symbol Unit Note/TestCondition Gate to source charge Qgs - 4.3 - nC VDD=40V,ID=20A,VGS=0to4.5V Gate charge at threshold Qg(th) - 2.4 - nC VDD=40V,ID=20A,VGS=0to4.5V Gate to drain charge Qgd - 3.9 - nC VDD=40V,ID=20A,VGS=0to4.5V Switching charge Qsw - 5.7 - nC VDD=40V,ID=20A,VGS=0to4.5V Gate charge total 1) Qg - 11 14 nC VDD=40V,ID=20A,VGS=0to4.5V Gate plateau voltage Vplateau - 3.0 - V VDD=40V,ID=20A,VGS=0to4.5V Gate charge total 1) Qg - 22 - nC VDD=40V,ID=20A,VGS=0to10V Gate charge total, sync. FET Qg(sync) - 20 - nC VDS=0.1V,VGS=0to10V Output charge Qoss - 23 - nC VDS=40V,VGS=0V 1) Defined by design. Not subject to production test. 2) See ″Gate charge waveforms″ for parameter definition |
|
|
Link URL |
| Does ALLDATASHEET help your business so far? [ DONATE ] |
About Alldatasheet | Advertisement | Contact us | Privacy Policy | Link to Datasheet | Link Exchange | Manufacturer List All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |
English ▼
English
Chinese
German
Japanese
Russian
Korean
Spanish
French
Italian
Portuguese
Polish
Vietnamese
Indian
Mexican
British
New Zealand
