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54F407LMQB Datasheet(PDF) 1 Page - National Semiconductor (TI) |
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54F407LMQB Datasheet(HTML) 1 Page - National Semiconductor (TI) |
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1 / 10 page  TLF9537 December 1994 54F407 Data Access Register General Description The ’F407 Data Access Register (DAR) performs memory address arithmetic for RAM resident stack applications It contains three 4-bit registers intended for Program Counter (R0) Stack Pointer (R1) and Operand Address (R2) The ’F407 implements 16 instructions which allow either pre- or post-decrementincrement and register-to-register transfer in a single clock cycle It is expandable in 4-bit increments and can operate at a 30 MHz microinstruction rate on a 16-bit word The TRI-STATE outputs are provided for bus- oriented applications The ’F407 is fully compatible with all TTL families Features Y High-speedgreater than a 30 MHz microinstruction rate Y Three 4-bit registers Y 16 instructions for register manipulation Y Two separate output ports one transparent Y Relative addressing capability Y TRI-STATE Outputs Y Optional pre- or post- arithmetic Y Expandable in multiples of four bits Y 24-pin slim package Y 9407 replacement Military Package Package Description Number 54F407DM (Note 1) J24A 24-Lead Ceramic Dual-In-Line 54F407SDM (Note 1) J24F 24-Lead (0300 Wide) Ceramic Dual-In-Line 54F407FM (Note 1) W24C 24-Lead Cerpack 54F407FM (Note 1) E28A 28-Lead Ceramic Leadless Chip Carrier Type C Note 1 Military grade device with environmental and burn-in processing Use suffix e DMQB FMQB and LMQB Logic Symbol Connection Diagrams TLF9537 – 3 Pin Assignment for DIP and Flatpak TLF9537 – 1 Pin Assignment for LCC TLF9537 – 2 TRI-STATE is a registered trademark of National Semiconductor Corporation C1995 National Semiconductor Corporation RRD-B30M105Printed in U S A |
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