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ST22T064-A Datasheet(PDF) 3 Page - STMicroelectronics

Part # ST22T064-A
Description  Smartcard 32-Bit RISC MCU with 64 Kbytes EEPROM & USB 2.0 Full Speed Device Controller
PDF  7 Pages
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Manufacturer  STMICROELECTRONICS [STMicroelectronics]
Direct Link  http://www.st.com
Logo STMICROELECTRONICS - STMicroelectronics

ST22T064-A Datasheet(HTML) 3 Page - STMicroelectronics

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ST22T064-A
DESCRIPTION
The ST22T064-A is a member of the SmartJ™
platform using a 32-bit Reduced Instruction Set
Computer (RISC) core to execute both Native
RISC instructions and JavaCard™ 2.x Technolo-
gy instruction (byte codes) directly (See Figure 2.
"SmartJ™ Platform EEPROM Architecture", on
page 3).
Direct JavaCard™ byte code execution provides
high performance advantage over processors that
emulate the JavaCard™ byte code instruction set.
The USB 2.0 full speed device controller allows
communication up to 12Mbits/s. The interface fea-
tures 16 configurable endpoints and supports con-
trol, bulk, interrupt and isochronous transfer
modes. This makes the ST22T064-A suitable for
PC and network access control as well as multi-
media applications such as secure multimedia
content broadcast. The clock recovery eliminates
the need for crystals or other external circuitry,
thus allowing cost effective USB token design.
Memory and Peripheral accesses are controlled
by a Memory Protection Unit that allows to imple-
ment firewalls between applications.
Memories are accessed via two different buses,
allowing simultaneous accesses to code and data.
Memory load and stores can be performed at byte,
short (2-bytes), or word (4-bytes) granularity, with
optional pointer auto increment.
The ST22 core includes dedicated instructions to
accelerate performances of the following algoriths:
–
DES and Triple DES
–
Modular Arithmetic on big numbers,
–
Characteristic two field arithmetic to support
efficiently Elliptic Curves,
–
CRC 16-bit ISO 3309.
Cryptography performance can be increased for
DES thanks to a dedicated DES / Triple DES ac-
celerator.
The product has clock and power management, 2
User configurable Timers, a Central Interrupt Con-
troller and a Random Number Generator.
Figure 2. SmartJ™ Platform EEPROM Architecture
POWER MANAGEMENT
32-bit
RISC
CORE
CLOCK MANAGEMENT
MPU
RAM
BUS 1
BUS 2
PERIPHERALS
ISO
ROM
EEPROM
7816



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