AT25SF641-DWF datasheet(65/76 Pages) DIALOG

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AT25SF641

DS-25SF641–111E–3/2018

7.39

Write Security Register (2Fh)

The Write Security Register instruction is for changing the values of Security Register bits. Unlike Write Status Register,

the Write Enable instruction is not required before writing Write Security Register instruction. The Write Security

Once the LDSO bit is set to “1”, the Secured OTP area cannot be updated any more.

The CS must go high exactly at the boundary; otherwise, the instruction is rejected and not executed.

Figure 7-63. Write Security Register instruction for SPI Mode (left) and QPI Mode (right)

7.40

4K-bit Secured OTP

It’s for unique identifier to provide 4K-bit one-time-program area for setting device unique serial number which may

be set by factory or system customer. Please refer to table of “4K-bit secured OTP definition”.

- Security register bit 0 indicates whether the chip is locked by factory or not.

- To program the 4K-bit secured OTP by entering 4K-bit secured OTP mode (with ENSO command) and going through

normal program procedure, and then exiting 4K-bit secured OTP mode by writing EXSO command

- Customer may lock-down bit1 as “1”. Please refer to “table of security register definition” for security register bit

definition and table of “4K-bit secured OTP definition” for address range definition.

Note. Once lock-down whatever by factory or customer, it cannot be changed any more. While in 4K-bit secured OTP

mode, array access is not allowed to write.

Table 7-13. Secured OTP

Address Range

Size

Standard

Customer Lock

000000 ~ 00000F

128-bit

ESN

(Electrical Serial Number)

Determined by customer

000010 ~ 0001FF

3968-bit

N/A

AT25SF641-DWF Datasheet(PDF) 65 Page - Dialog Semiconductor