8442AYI

www.icst.com/products/hiperclocks.html

REV. C MAY 10, 2005

8

Integrated

Circuit

Systems, Inc.

ICS8442I

A variety of technologies are used for interconnection of the

elements within a SAN. The tables below lists the common fre-

Table 8. Common SANs Application Frequencies

Table 9. Configuration Details for SANs Applications

y

g

o

l

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c

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T

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t

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f

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)

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G

5

2

.

15

2

.

6

5

1

,

0

5

2

,

5

2

15

2

1

3

5

.

9

1

,

5

2

l

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n

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a

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C

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r

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5

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1

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1

.

2

2

C

F

5

2

1

8

.

2

3

1

,

5

2

1

.

3

5

,

5

2

.

6

0

15

2

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5

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6

5

1

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6

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6

1

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5

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20

5

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2

15

2

As in any high speed analog circuitry, the power supply pins

are vulnerable to random noise. The ICS8442I provides sepa-

rate power supplies to isolate any high switching noise from

the outputs to the internal PLL. V

should

be individually connected to the power supply plane through

vias, and bypass capacitors should be used for each pin. To

achieve optimum jitter performance, better power supply

isolation is required.

Figure 2 illustrates how a 10

Ω along

|with a 10

μF and a .01μF bypass capacitor should be

connected to each V

10

Ω

V

DDA

10

μF

.01

μF

3.3V

.01

μF

V

DD

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C

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(

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2

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4

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(

I

2

4

4

8

S

C

I

s

g

n

i

t

t

e

S

N

&

M

8

M7

M6

M5

M4

M3

M2

M1

M0

M1

N0

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t

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h

t

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t

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b

a

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5

25

2

1

0000

1

0

1

00

1

0

5

20

5

2

0000

1

0

1

000

1

5

25

2

.

6

5

1

0000

11

00

11

0

5

2

1

3

5

.

9

15

2

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6

5

1

000

1

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1

0

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l

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5

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5

0000

1

000

111

5

25

2

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6

0

1

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1

000

11

0

2

l

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n

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a

h

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6

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1

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.

6

15

2

1

8

.

2

3

1

000

1

00000

1

0

d

n

a

b

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n

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f

n

I

5

25

2

1

0000

1

0

1

00

1

0

5

20

5

2

0000

1

0

1

000

1

quencies used as well as the settings for the ICS8442I to gen-

erate the appropriate frequency.