Electronic Components Datasheet Search
  English  ▼
ALLDATASHEET.NET

X  

ICS85211AMIT Datasheet(PDF) 5 Page - Integrated Circuit Systems

Part # ICS85211AMIT
Description  LOW SKEW, 1-TO-2 DIFFERENTIAL-TO-LVHSTL FANOUT BUFFER
PDF  12 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
Manufacturer  ICST [Integrated Circuit Systems]
Direct Link  http://www.icst.com
Logo ICST - Integrated Circuit Systems

ICS85211AMIT Datasheet(HTML) 5 Page - Integrated Circuit Systems

  ICS85211AMIT Datasheet HTML 1Page - Integrated Circuit Systems ICS85211AMIT Datasheet HTML 2Page - Integrated Circuit Systems ICS85211AMIT Datasheet HTML 3Page - Integrated Circuit Systems ICS85211AMIT Datasheet HTML 4Page - Integrated Circuit Systems ICS85211AMIT Datasheet HTML 5Page - Integrated Circuit Systems ICS85211AMIT Datasheet HTML 6Page - Integrated Circuit Systems ICS85211AMIT Datasheet HTML 7Page - Integrated Circuit Systems ICS85211AMIT Datasheet HTML 8Page - Integrated Circuit Systems ICS85211AMIT Datasheet HTML 9Page - Integrated Circuit Systems Next Button
Zoom Inzoom in Zoom Outzoom out
 5 / 12 page
background image
85211AMI
www.icst.com/products/hiperclocks.html
REV. B ARPIL 8, 2003
5
Integrated
Circuit
Systems, Inc.
ICS85211I
LOW SKEW, 1-TO-2
DIFFERENTIAL-TO-LVHSTL FANOUT BUFFER
SCHEMATIC EXAMPLE
Figure 2 shows a schematic example of ICS85211I. In this
example, the input is driven by an ICS HiPerClockS LVHSTL
driver. The decoupling capacitors should be physically located
FIGURE 2. ICS85211I LVHSTL BUFFER SCHEMATIC EXAMPLE
near the power pin. For ICS85211I, the unused outputs need
to be terminated.
APPLICATION INFORMATION
Figure 1 shows how the differential input can be wired to accept
single ended levels. The reference voltage V_REF = V
DD/2 is
generated by the bias resistors R1, R2 and C1. This bias circuit
should be located as close as possible to the input pin. The ratio
FIGURE 1. SINGLE ENDED SIGNAL DRIVING DIFFERENTIAL INPUT
of R1 and R2 might need to be adjusted to position the V_REF in
the center of the input voltage swing. For example, if the input
clock swing is only 2.5V and V
DD = 3.3V, V_REF should be 1.25V
and R2/R1 = 0.609.
WIRING THE DIFFERENTIAL INPUT TO ACCEPT SINGLE ENDED LEVELS
VDD=3.3V
ICS
Unused
Output
Need To
Be
Terminated
Zo = 50 Ohm
R4
50
Zo = 50 Ohm
C1
0.1u
1.8V
R1
50
HiPerClockS
LVHSTL Input
+
-
Zo = 50 Ohm
LVHSTL
R5
50
Zo = 50 Ohm
LVHSTL Driv er
R2
50
R6
50
R3
50
U1
ICS85211
1
2
3
4
8
7
6
5
Q0
nQ0
Q1
nQ1
VDD
CLK
nCLK
GND
V_REF
R1
1K
C1
0.1u
R2
1K
Single Ended Clock Input
CLK
nCLK
VDD



Html Pages

1 2 3 4 5 6 7 8 9 10 11 12


Datasheet Download

Go To PDF Page


Link URL



Does ALLDATASHEET help your business so far?  [ DONATE ] 

About Alldatasheet   |   Advertisement   |   Contact us   |   Privacy Policy   |   Link to Datasheet    |   Link Exchange   |   Manufacturer List
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com