211AI01L datasheet(6/13 Pages) ICST

6 / 13 page

85211AMI-01

www.icst.com/products/hiperclocks.html

REV. A NOVEMBER 1, 2005

Integrated

Circuit

Systems, Inc.

ICS85211I-01

LOW SKEW, 1-TO-2

DIFFERENTIAL-TO-HSTL FANOUT BUFFER

SCHEMATIC EXAMPLE

Figure 2 shows a schematic example of ICS85211I-01. In this

example, the input is driven by an ICS HiPerClockS HSTL driver.

The decoupling capacitors should be physically located near

FIGURE 2. ICS85211I-01 HSTL BUFFER SCHEMATIC EXAMPLE

the power pin. For ICS85211I-01, the unused outputs

need to be terminated.

APPLICATION INFORMATION

Figure 1 shows how the differential input can be wired to accept

single ended levels. The reference voltage V_REF = V

DD/2 is

generated by the bias resistors R1, R2 and C1. This bias circuit

should be located as close as possible to the input pin. The ratio

FIGURE 1. SINGLE ENDED SIGNAL DRIVING DIFFERENTIAL INPUT

of R1 and R2 might need to be adjusted to position the V_REF in

the center of the input voltage swing. For example, if the input

clock swing is only 2.5V and V

DD = 3.3V, V_REF should be 1.25V

and R2/R1 = 0.609.

WIRING THE DIFFERENTIAL INPUT TO ACCEPT SINGLE ENDED LEVELS

0.1u

ICS85211-01

nQ0

nQ1

VDD

CLK

nCLK

GND

Zo = 50 Ohm

1.8V

Zo = 50 Ohm

LVHSTL

LVHSTL Driv er

VDD=3.3V

HiPerClockS

ICS

Unused

Output

Need To

Terminated

LVHSTL Input

V_REF

0.1u

Single Ended Clock Input

CLK

nCLK

VDD

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