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PCF8545ATT Datasheet(PDF) 8 Page - NXP Semiconductors

Part # PCF8545ATT
Description  Automotive 18 횞 4 LCD segment driver
PDF  50 Pages
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Manufacturer  NXP [NXP Semiconductors]
Direct Link  http://www.nxp.com
Logo NXP - NXP Semiconductors

PCF8545ATT Datasheet(HTML) 8 Page - NXP Semiconductors

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NXP Semiconductors
PCA8561
Automotive 18 × 4 LCD segment driver
CLK should be left open. The design ensures that the duty cycle of the clock output is
50 : 50 (% HIGH-level time : % LOW-level time).
In applications where an external clock has to be applied to the PCA8561, bit OSC must
be set logic 1 and COE logic 0. In this case pin CLK becomes an input.
In power-down mode (see Section 7.3.1)
• if pin CLK is configured as an output, there is no signal on CLK
• if pin CLK is configured as an input, the signal on CLK can be removed.
Remark: A clock signal must always be supplied to the device if the display is enabled
(see bit DE in Table 6). Removing the clock may freeze the LCD in a DC state, which is
not suitable for the liquid crystal.
7.2.2 Command: Display_ctrl_1
The Display_ctrl_1 command allows configuring the basic display set-up.
Bit
Symbol
Value
Description
7 to 5
-
000
default value
large display mode support
0[1]
standard power drive scheme
4
BOOST
1
enhanced power drive scheme for higher display
loads
multiplex drive mode selection
00[1]
1:4 multiplex drive mode; COM0 to COM3 (nMUX =
4)
01
1:3 multiplex drive mode; COM0 to COM2 (nMUX =
3)
10
1:2 multiplex drive mode; COM0 and COM1 (nMUX
= 2)
3 to 2
MUX[1:0]
11
static drive mode; COM0 (nMUX = 1)
bias mode selection
0[1]
1⁄3 bias (abias = 2)
1
B[2]
1
1⁄2 bias (abias = 1)
display enable[3]
0[1]
display disabled; device is in power-down mode
0
DE
1
display enabled; device is in power-on mode
Table 6. Display_ctrl_1 - display control command 1 register (address 02h) bit
description
[1]
Default value.
[2]
Not applicable for static drive mode.
[3]
See Section 7.3.1.
7.2.2.1 Enhanced power drive mode
By setting the BOOST bit to logic 1, the driving capability of the display signals is
increased to cope with large displays with a higher effective capacitance. Setting this bit
increases the current consumption on VLCD.
PCA8561
All information provided in this document is subject to legal disclaimers.
© NXP B.V. 2021. All rights reserved.
Product data sheet
Rev. 5 — 15 March 2021
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