844004AGI-04

www.icst.com/products/hiperclocks.html

REV. A JANUARY 26, 2006

10

Integrated

Circuit

Systems, Inc.

ICS844004I-04

PRELIMINARY

This section provides information on power dissipation and junction temperature for the ICS844004I-04.

Equations and example calculations are also provided.

1. Power Dissipation.

The total power dissipation for the ICS844004I-04 is the sum of the core power plus the power dissipated in the load(s).

The following is the power dissipation for V

Total Power

2. Junction Temperature.

Junction temperature, Tj, is the temperature at the junction of the bond wire and bond pad and directly affects the reliability

The equation for Tj is as follows: Tj =

θ

Tj = Junction Temperature

q

Pd_total = Total Device Power Dissipation (example calculation is in section 1 above)

T

In order to calculate junction temperature, the appropriate junction-to-ambient thermal resistance

θ

Assuming a moderate air flow of 1 meter per second and a multi-layer board, the appropriate value is 65°C/W per Table 7

below.

Therefore, Tj for an ambient temperature of 85°C with all outputs switching is:

85°C + 0.606W * 65°C/W = 124°C. This is below the limit of 125°C.

This calculation is only an example. Tj will obviously vary depending on the number of loaded outputs, supply voltage, air

flow, and the type of board (single layer or multi-layer).

θθθθθ

JA

FOR

θθθθθ

0

1

2.5

Multi-Layer PCB, JEDEC Standard Test Boards

70°C/W

65°C/W

62°C/W