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ICS8312I Datasheet(PDF) 1 Page - Integrated Circuit Systems

Part # ICS8312I
Description  LOW SKEW, 1-TO-12 LVCMOS / LVTTL FANOUT BUFFER
PDF  11 Pages
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Manufacturer  ICST [Integrated Circuit Systems]
Direct Link  http://www.icst.com
Logo ICST - Integrated Circuit Systems

ICS8312I Datasheet(HTML) 1 Page - Integrated Circuit Systems

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8312AYI
http://www.icst.com/products/hiperclocks.html
REV. A OCTOBER 23, 2003
1
Integrated
Circuit
Systems, Inc.
ICS8312I
LOW SKEW, 1-TO-12
LVCMOS / LVTTL FANOUT BUFFER
GENERAL DESCRIPTION
The ICS8312I is a low skew, 1-to-12 LVCMOS /
LVTTL Fanout Buffer and a member of the
HiPerClockS™family of High Performance Clock
Solutions from ICS. The ICS8312I single ended
clock input accepts LVCMOS or LVTTL input lev-
els. The low impedance LVCMOS outputs are designed to
drive 50
Ω series or parallel terminated transmission lines.The
effective fanout can be increased from 12 to 24 by utilizing
the ability of the outputs to drive two series terminated lines.
The ICS8312I is characterized at full 3.3V, 2.5V, and 1.8V, or
mixed 3.3V core/2.5V, 3.3V core/1.8V and 2.5V core/1.8V out-
put operating supply modes. Guaranteed output and part-to-
part skew characteristics along with the 1.8V output capa-
bilities makes the ICS8312I ideal for high performance, single
ended applications that also require a limited output voltage.
BLOCK DIAGRAM
PIN ASSIGNMENT
FEATURES
• 12 LVCMOS / LVTTL outputs
• LVCMOS / LVTTL clock input
• Maximum output frequency: 250MHz
• Output skew: 160ps (maximum)
• Operating supply modes: Core/Output
3.3V/3.3V
2.5V/2.5V
1.8V/1.8V
3.3V/2.5V
3.3V/1.8V
2.5V/1.8V
• -40°C to 85°C ambient operating temperature
HiPerClockS™
ICS
32 31 30 29 28 27 26 25
9
10 11 12 13 14 15 16
1
2
3
4
5
6
7
8
24
23
22
21
20
19
18
17
Q4
VDDO
Q5
GND
Q6
VDDO
Q7
GND
GND
VDD
CLK_EN
CLK
GND
OE
VDD
GND
ICS8312I
32-Lead LQFP
7mm x 7mm x 1.4mm body package
Y Pacakge
Top View
Q0:Q11
CLK_EN
CLK
OE
nD
Q
LE
12


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