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ICS852911AVIT Datasheet(PDF) 8 Page - Integrated Circuit Systems |
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ICS852911AVIT Datasheet(HTML) 8 Page - Integrated Circuit Systems |
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8 / 15 page ![]() Integrated Circuit Systems, Inc. ICS852911I LOW SKEW, 1-TO-9 DIFFERENTIAL-TO-HSTL FANOUT BUFFER 852911AVI www.icst.com/products/hiperclocks.html REV. A MAY 23, 2005 8 LVPECL CLOCK INPUT INTERFACE The PECL_CLK/nPECL_CLK accepts LVPECL, CML, SSTL and other differential signals. Both V SWING and VOH must meet the V PP and VCMR input requirements. Figures 3A to 3E show interface examples for the HiPerClockS PECL_CLK/ nPECL_CLK input driven by the most common driver types. The input interfaces suggested here are examples only. If the driver is from another vendor, use their termination recom- mendation. Please consult with the vendor of the driver com- ponent to confirm the driver termination requirements. FIGURE 3A. HIPERCLOCKS PECL_CLK/nPECL_CLK INPUT DRIVEN BY A CML DRIVER FIGURE 3B. HIPERCLOCKS PECL_CLK/nPECL_CLK INPUT DRIVEN BY AN SSTL DRIVER FIGURE 3C. HIPERCLOCKS PECL_CLK/nPECL_CLK INPUT DRIVEN BY A 3.3V LVPECL DRIVER FIGURE 3D. HIPERCLOCKS PECL_CLK/nPECL_CLK INPUT DRIVEN BY A 3.3V LVDS DRIVER HiPerClockS PCLK nPCLK PCLK/nPCLK 3.3V R2 50 R1 50 3.3V Zo = 50 Ohm CML 3.3V Zo = 50 Ohm PCLK/nPCLK 2.5V Zo = 60 Ohm SSTL HiPerClockS PCLK nPCLK R2 120 3.3V R3 120 Zo = 60 Ohm R1 120 R4 120 2.5V FIGURE 3E. HIPERCLOCKS PECL_CLK/nPECL_CLK INPUT DRIVEN BY A 3.3V LVPECL DRIVER WITH AC COUPLE 3.3V R5 100 - 200 3.3V 3.3V HiPerClockS PCLK nPCLK R1 125 PCLK/nPCLK R2 125 R3 84 C1 C2 Zo = 50 Ohm R4 84 Zo = 50 Ohm R6 100 - 200 3.3V LVPECL C2 R2 1K R5 100 Zo = 50 Ohm 3.3V 3.3V C1 R3 1K LVDS R4 1K HiPerClockS PCLK nPCLK R1 1K Zo = 50 Ohm 3.3V PC L K/n PCL K 3.3V HiPerClockS PCLK nPCLK R2 84 R3 125 Input Zo = 50 Ohm R4 125 R1 84 LVPECL 3.3V 3.3V Zo = 50 Ohm |
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