ADN8835

Data Sheet

Rev. B | Page 8 of 27

PIN CONFIGURATION AND FUNCTION DESCRIPTIONS

Figure 4. Pin Configuration

Table 5. Pin Function Descriptions

Pin No.

Mnemonic Description

0

EPAD

Exposed Pad. Solder the exposed pad to the analog ground plane on the board.

1, 2, 9, 10, 11, 19,

35, 36

DNC

Do Not Connect. Leave these pins floating.

3

IN2N

Inverting Input of the Compensation Amplifier.

4

OUT2

Output of the Compensation Amplifier.

5

VLIM/SD

Voltage Limit/Shutdown. This pin sets the cooling and heating TEC voltage limits. When this pin is pulled

low, the device shuts down.

6

ILIM

Current Limit. This pin sets the TEC cooling and heating current limits.

7

VDD

Power for the Controller Circuits.

8

VREF

2.5 V Reference Output.

12

AGND

Signal Ground.

13

EN/SY

Enable/Synchronization. Set this pin high to enable the device. An external synchronization clock input

can be applied to this pin.

14

VTEC

TEC Voltage Output.

15

SFB

Feedback of the PWM TEC Controller Output.

16

ITEC

TEC Current Output.

17, 18

PGNDS

Power Ground of the PWM TEC Controller.

20, 21

SW

Switch Node Output of the PWM TEC Controller.

22, 23

PVINS

Power Input for the PWM TEC Driver.

24, 25

PVINL

Power Input for the Linear TEC Driver.

26, 27

LDR

Output of the Linear TEC Controller.

28, 29

PGNDL

Power Ground of the Linear TEC Controller.

30

TMPGD

Temperature Good Output.

31

OUT1

Output of the Error Amplifier.

32

IN1N

Inverting Input of the Error Amplifier.

33

IN1P

Noninverting Input of the Error Amplifier.

34

IN2P

Noninverting Input of the Compensation Amplifier.

1

DNC

2

DNC

3

IN2N

4

OUT2

5

VLIM/SD

6

ILIM

7

VDD

8

VREF

9

DNC

27 LDR

26 LDR

25 PVINL

24 PVINL

23 PVINS

22 PVINS

21 SW

20 SW

19 DNC

ADN8835

TOP VIEW

(Not to Scale)

NOTES

1. DO NOT CONNECT. LEAVE THESE PINS PIN FLOATING.

2. EXPOSED PAD. SOLDER THE EXPOSED PAD TO THE

ANALOG GROUND PLANE ON THE BOARD.