ADP5360 datasheet(21/60 Pages) AD

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Data Sheet

ADP5360

Rev. 0 | Page 21 of 60

Trickle Charge Mode Timer

The duration of trickle charge mode is monitored to ensure that

the battery revives from the deeply discharged state. If trickle

charge mode runs for longer than tTRK without the cell voltage

reaching VTRK_DEAD, a fault condition is assumed and charging

stops. The battery isolation FET turns off, and VSYS is regulated

to VSYS_REG by the linear regulator. The fault condition asserts on

when the CHARGER_STATUS[2:0] bits are set to 0b110,

allowing the user to initiate the fault recovery procedure

specified in the Fault Recovery section.

Weak Charge Mode (Constant Current)

When the battery voltage exceeds VTRK_DEAD but is less than

VWEAK, the charger switches to the weak charge mode, and VSYS

is regulated to VSYS_REG by the battery isolation FET. Note that,

VSYSTEM = 5 V is not active on the output of VSYS_REG during

charge mode.

During weak charge mode, the battery is charged with

programmed ICHG from VSYS through the isolation FET and

ITRK_DEAD. Due to the VBUS input current limit, the real charge

current (ICHG) from VSYS may be less than the programmed

value. System load can share the current from VSYS. However,

ITRK_DEAD always charges the battery during weak charge mode.

Fast Charge Mode (Constant Current)

When the battery voltage exceeds VWEAK, the charger switches to

fast charge mode, charging the battery with ICHG. Address 0x04,

ICHG[4:0] programs ICHG via the I2C interface. During fast charge

mode (constant current), the CHARGER_STATUS[2:0] bits are set

to 0b010. The default ICHG value can be set by the external

resistor from the ICS pin (RICS) to ground. Floating the ICS pin

activates the register default value when powering up.

Table 12. Charge Current Default Set Using the ICS Pin

RICS Value (kΩ)

ICHG Value (mA)

100

150

200

250

300

During constant current mode, other features can prevent ICHG

from reaching the full programmed value. Input current

limiting for USB compatibility can affect the ICHG value under

certain operating conditions. The battery isolation FET regulates

VVSYS to stay at VSYS_REG. Note that, VSYSTEM = 5 V is not active on

the output of VSYS_REG during charge mode.

The ADP5360 features a dynamic charge current that is

adaptive when VVBUS drops too much due to possible high

internal impedance. The dynamic charge current monitors

VVBUS and reduces the charge current level when VVBUS falls

lower than the threshold, which can be programed by the I2C

interface. When the charge current adapts due to the VVBUS level,

the ADPICHG status bit is set high. By default, this feature is

disabled and can be enabled by the I2C setting.

Fast Charge Mode (Constant Voltage)

As the battery charges, the voltage rises and approaches VTRM.

The ADP5360 charger monitors VBSNS to determine when charging

ends. However, the internal impedance of the battery pack

combined with the PCB and other parasitic series resistances

creates a voltage drop between the sense point at the BSNS pin

and the cell terminal. To compensate for this voltage drop and

ensure a fully charged cell, the ADP5360 enters a constant voltage

charge mode when VBSNS reaches the termination voltage. The

ADP5360 reduces charge current gradually as the cell continues to

charge, maintaining a voltage of VTRM on the BSNS pin. During

constant voltage fast charge mode, the CHARGER_STATUS[2:0]

bits are set to 0b011.

Fast Charge Mode Timer

The duration of fast charge mode is monitored to ensure that

the battery is charging correctly. If the fast charge mode runs for

longer than tCHG without VBSNS reaching VTRM, a fault condition

is assumed, charging stops, the battery isolation FET turns off,

and VSYS regulates to VSYS_REG by the linear regulator. A fault

condition asserts on when the CHARGER_STATUS[2:0] bits

are set to 0b110, allowing the user to initiate the fault recovery

procedure specified in the Fault Recovery section.

If the fast charge mode runs for longer than tCHG and the BSNS

pin reaches VTRM but the charge current has not yet fallen lower

than IEND, charging stops by turning off the battery isolation

FET. Note that the linear regulator still works, and VSYS regulates

to VSYS_REG. No fault condition is asserted in this circumstance, and

the ADP5360 attains charge complete status.

Safety Timer

If the watchdog timer (see the Watchdog Timer section for more

information) expires while in charger mode, the ADP5360 charger

initiates tSAFE. Charging continues for a period of tSAFE, then stops

by turning off the battery isolation FET and setting the

CHARGER_STATUS[2:0] bits to 0b110.

ADP5360 Datasheet(PDF) 21 Page - Analog Devices

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