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INA186A1IDDFT Datasheet(PDF) 14 Page - Texas Instruments |
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INA186A1IDDFT Datasheet(HTML) 14 Page - Texas Instruments |
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14 / 46 page ![]() 7.4 Device Functional Modes 7.4.1 Normal Operation The INA186 is in normal operation when the following conditions are met: • The power-supply voltage (VS) is between 1.7 V and 5.5 V. • The common-mode voltage (VCM) is within the specified range of –0.2 V to +40 V. • The maximum differential input signal times the gain plus VREF is less than the positive swing voltage VSP. • The ENABLE pin is driven or connected to VS. • The minimum differential input signal times the gain plus VREF is greater than the zero load swing to GND, VZL (see Rail-to-Rail Output Swing). For devices that do not feature a REF pin that value for VREF will be zero. During normal operation, this device produces an output voltage that is the amplified representation of the difference voltage from IN+ to IN– plus the voltage applied to the REF pin. 7.4.2 Unidirectional Mode This device can be configured to monitor current flowing in one direction (unidirectional) or in both directions (bidirectional) depending on how the REF pin is connected. Figure 7-2 shows the most common case is unidirectional where the output is set to ground when no current is flowing by connecting the REF pin to ground. When the current flows from the bus supply to the load, the input voltage from IN+ to IN– increases and causes the output voltage at the OUT pin to increase. VOUT VS 1.7 V to 5.5 V IN± IN+ VS OUT + ± Bus Voltage up to 40 V RSENSE Load Capacitively Coupled Amplifier INA186 REF GND ISENSE CBYPASS 0.1 µF Figure 7-2. Typical Unidirectional Application The linear range of the output stage is limited by how close the output voltage can approach ground under zero input conditions. The zero current output voltage of the INA186 is very small and for most unidirectional applications the REF pin is simply grounded. However, if the measured current multiplied by the current sense resistor and device gain is less than the zero current output voltage, then bias the REF pin to a convenient value above the zero current output voltage to get the output into the linear range of the device. To limit common-mode rejection errors, buffer the reference voltage connected to the REF pin. A less-frequently used output biasing method is to connect the REF pin to the power-supply voltage, VS. This method results in the output voltage saturating at 40 mV less than the supply voltage when no differential input voltage is present. This method is similar to the output saturated low condition with no differential input voltage when the REF pin is connected to ground. The output voltage in this configuration only responds to currents that develop negative differential input voltage relative to the device IN– pin. Under these conditions, when INA186 SBOS318B – APRIL 2019 – REVISED JULY 2021 www.ti.com 14 Submit Document Feedback Copyright © 2021 Texas Instruments Incorporated Product Folder Links: INA186 |
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