LM5035 datasheet(22/28 Pages) NSC

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Applications Information (Continued)

To maintain the threshold’s accuracy, a resistor tolerance of

1% or better is recommended.

The design process starts with the choice of the voltage

difference between the UVLO enabling and disabling thresh-

olds. This will also approximately set the difference between

OVP enabling and disabling regulation:

Next, the combined resistance of R

2 and R3 is calculated by

choosing the threshold for the UVLO disabling threshold:

Then R

is determined by selecting the OVP disabling

threshold:

Finally, R

3 is subtracted from RCOMBINED to give R2:

2 =RCOMBINED -R3

Remote configuration of the controller’s operational modes

can be accomplished with open drain device(s) connected to

the UVLO pin as shown in Figure 13.

FAULT PROTECTION

The Over Voltage Protection (OVP) comparator of the

LM5035 can be configured for line or load fault protection or

thermal protection using an external temperature sensor or

thermistor. Figure 11 shows a line over voltage shutdown

application using a voltage divider between the input power

supply, V

PWR, and AGND to monitor the line voltage.

Figure 14 demonstrates the use of the OVP pin for latched

output over-voltage fault protection, using a zener and opto-

coupler. When V

OUT exceeds the conduction threshold of

the opto-coupler diode and zener, the opto-coupler momen-

tarily turns on Q1 and the LM5035 enters standby mode,

disabling the drivers and enabling the hysteresis current

source on the OVP pin. Once the current source is enabled,

the OVP voltage will remain at 2.3V (23µA x 100k

Ω) without

additional drive from the external circuit. If the opto-coupler

transistor emitter were directly connected to the OVP pin,

then leakage current in the zener diode amplified by the

opto-coupler’s gain could falsely trip the protection latch. R1

and Q1 are added reduce the sensitivity to low level currents

in the opto-coupler. Using the values of Figure 14, the opto-

coupler collector current must equal V

BE(Q1) / R1 = 350µA

before OVP latches. Once the controller has switched to

standby mode, the outputs no longer switch but the VCC and

REF regulators continue functioning and supply bias to the

external circuitry. VCC must fall below 6.2V or the UVLO pin

must fall below 0.4V to clear the OVP latch.

20177536

FIGURE 13. Remote Standby and Disable Control

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