ISO6760L Six-Channel Reinforced Digital Isolators with Integrated Interlock and

Robust EMC

1 Features

• ISO6760 with integrated Interlock function

– Designed to support opposite polarity of

adjacent channels

– Three sets of paired interlock channels

• Robust isolation barrier:

– Up to 10 kV surge capability

– ±130 kV/μs typical CMTI

• Wide supply range: 1.71 V to 1.89 V and 2.25 V to

5.5 V

• Channel output non-inverting (ISO6760L) and

inverting (ISO6760LN) options

• 50 Mbps data rate

• 1.71 V to 5.5 V level translation

• Wide temperature range: –40°C to 125°C

• 1.4 mA per channel typical at 1 Mbps

• Robust electromagnetic compatibility (EMC)

– System-level ESD, EFT, and surge immunity

– Low emissions

• Wide-SOIC (DW-16) Package

• Safety-Related Certifications (pending):

– DIN VDE V 0884-11:2017-01

– UL 1577 component recognition program

– IEC 62368-1, IEC 61010-1, IEC 60601-1 and

GB 4943.1-2011 certifications

2 Applications

• Motor drives

• Appliances

• Grid

• Building Automation

3 Description

The ISO6760L and ISO6760LN devices are high-

performance,

six-channel

digital

isolators

with

integrated interlock function for applications requiring

devices are also certified by VDE, TUV, CSA, and

CQC.

The ISO6760L family of devices integrate a series of

logic gates to provide hardware interlock functionality

for adjacent channels. The interlock feature ensures

that each channel, in a channel pairing, will not be

enabled at the same time. If both channels in the

pairing share the same input logic, the output logic will

always be low. The ISO6760L family of devices have

all six channels in the same direction and provide

high electromagnetic immunity and low emissions at

low power consumption, while isolating CMOS or

LVCMOS digital I/Os. Each isolation channel has a

logic input and output buffer separated by TI's double

Used in conjunction with intelligent power modules

(IPMs), the interlock feature in these devices help

prevent shoot through current between the high

side and low side gate driver during turn on

and turn off events. Six channels, including three

pairings of interlock circuitry, are integrated in a

16-pin SOIC wide-body (DW) package with space

savings greater than 50% compared to optocoupler

solutions. Through innovative chip design and layout

techniques, the electromagnetic compatibility of the

ISO6760L devices has been significantly enhanced to

ease system-level ESD, EFT, surge, and emissions

compliance.

Device Description

Part Number

Package

Body Size

ISO6760L,

ISO6760LN

SOIC (DW)

10.30 mm × 7.50

mm

C2000

MCU

GND1

GND2

9

8

INC_L

OUTC_L

10

7

INC_H

OUTC_H

11

6

INB_L

OUTB_L

12

5

INB_H

OUTB_H

13

4

INA_L

OUTA_L

14

3

INA_H

OUTA_H

15

2

16

1

I

N

T

E

R

L

O

C

K

I

N

T

E

R

L

O

C

K

I

N

T

E

R

L

O

C

K

IPM

Level

shift

High side

gate driver

High side

gate driver

High side

gate driver

3 phase

IGBT

inverter

Low side

gate driver

M

ISO6760L

Simplified Schematic

ISO6760L

SLLSFO3 – DECEMBER 2021

An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,

intellectual property matters and other important disclaimers. PRODUCTION DATA.