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STM32469VG Datasheet(PDF) 141 Page - STMicroelectronics

Part # STM32469VG
Description  Arm® Cortex®-M4 32b MCUFPU, 225DMIPS, up to 2MB Flash/3844KB RAM, USB OTG HS/FS, Ethernet, FMC, dual Quad-SPI, Graphical accelerator, Camera IF, LCD-TFT & MIPI DSI
PDF  220 Pages
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Manufacturer  STMICROELECTRONICS [STMicroelectronics]
Direct Link  http://www.st.com
Logo STMICROELECTRONICS - STMicroelectronics

STM32469VG Datasheet(HTML) 141 Page - STMicroelectronics

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DS11189 Rev 7
141/220
STM32F469xx
Electrical characteristics
191
5.3.22
TIM timer characteristics
The parameters given in Table 62 are guaranteed by design. Refer to Section 5.3.20 for
details on the input/output alternate function characteristics (output compare, input capture,
external clock, PWM output).
5.3.23
Communications interfaces
I2C interface characteristics
The I2C interface meets the timings requirements of the I2C-bus specification and user
manual rev. 03 for:
Standard-mode (Sm): bit rate up to 100 kbit/s
Fast-mode (Fm): bit rate up to 400 kbit/s.
The I2C timings requirements are guaranteed by design when the I2C peripheral is properly
configured (refer to RM0386 reference manual).
The SDA and SCL I/O requirements are met with the following restrictions: the SDA and
SCL I/O pins are not “true” open-drain. When configured as open-drain, the PMOS
connected between the I/O pin and VDD is disabled, but is still present. Refer to
Section 5.3.20 for more details on the I2C I/O characteristics.
All I2C SDA and SCL I/Os embed an analog filter, whose characteristics are detailed in
Table 63.
Table 62. TIMx characteristics(1)(2)
1. TIMx is used as a general term to refer to the TIM1 to TIM12 timers.
2. Guaranteed by design.
Symbol
Parameter
Conditions(3)
3. The maximum timer frequency on APB1 or APB2 is up to 180 MHz, by setting the TIMPRE bit in the
RCC_DCKCFGR register, if APBx prescaler is 1 or 2 or 4, then TIMxCLK = HCKL, otherwise TIMxCLK =
4x PCLKx.
Min
Max
Unit
tres(TIM)
Timer resolution time
AHB/APBx prescaler =
1 or 2 or 4,
fTIMxCLK = 180 MHz
1-
tTIMxCLK
AHB/APBx prescaler > 4,
fTIMxCLK = 90 MHz
1-
tTIMxCLK
fEXT
Timer external clock
frequency on CH1 to CH4 f
TIMxCLK = 180 MHz
0
fTIMxCLK/2
MHz
ResTIM
Timer resolution
-
16/32
bit
tMAX_COUNT
Maximum possible count
with 32-bit counter
--
65536 ×
65536
tTIMxCLK
Table 63. I2C analog filter characteristics(1)
1. Guaranteed based on test during characterization.
Symbol
Parameter
Min
Max
Unit
tAF
Maximum pulse width of spikes
suppressed by the analog filter
50(2)
150(3)
ns



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