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STM32469VG Datasheet(PDF) 143 Page - STMicroelectronics |
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STM32469VG Datasheet(HTML) 143 Page - STMicroelectronics |
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143 / 220 page  DS11189 Rev 7 143/220 STM32F469xx Electrical characteristics 191 tw(SCKH) tw(SCKL) SCK high and low time Master mode, SPI presc = 2 TPCLK−1.5 TPCLK TPCLK+1.5 ns tsu(NSS) NSS setup time Slave mode, SPI presc = 2 4 TPCLK -- th(NSS) NSS hold time Slave mode, SPI presc = 2 2 TPCLK tsu(MI) Data input setup time Master mode 2 - - tsu(SI) Slave mode 3 - - th(MI) Data input hold time Master mode 4 - - th(SI) Slave mode 2 - - ta(SO) Data output access time Slave mode, SPI presc = 2 7 - 21 tdis(SO) Data output disable time Slave mode 5 - 12 tv(SO) Data output valid time Slave mode, 2.7 V ≤ VDD ≤ 3.6 V -11 15 Slave mode, 1.71 V ≤ VDD ≤ 3.6 V -11 11.5 th(SO) Data output hold time Slave mode 6 - - tv(MO) Data output valid time Master mode - 4.5 5 th(MO) Data output hold time Master mode 2 - - 1. Guaranteed based on test during characterization. 2. Maximum frequency in Slave transmitter mode is determined by the sum of tv(SO) and tsu(MI), which has to fit into SCK low or high phase preceding the SCK sampling edge. This value can be achieved when the SPI communicates with a master having tsu(MI) = 0 while Duty(SCK) = 50% Table 64. SPI dynamic characteristics(1) (continued) Symbol Parameter Conditions Min Typ Max(2) Unit |
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