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STM8S007C8 Datasheet(PDF) 38 Page - STMicroelectronics

Part # STM8S007C8
Description  Value line, 24 MHz STM8S 8-bit MCU, 64 Kbytes Flash, true data EEPROM, 10-bit ADC, timers, 2 UARTs, SPI, I²C
PDF  93 Pages
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Manufacturer  STMICROELECTRONICS [STMicroelectronics]
Direct Link  http://www.st.com
Logo STMICROELECTRONICS - STMicroelectronics

STM8S007C8 Datasheet(HTML) 38 Page - STMicroelectronics

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Option bytes
STM8S007C8
38/93
DS8633 Rev 6
8
Option bytes
Option bytes contain configurations for device hardware features as well as the memory
protection of the device. They are stored in a dedicated block of the memory. Except for the
ROP (read-out protection) byte, each option byte has to be stored twice, in a regular form
(OPTx) and a complemented one (NOPTx) for redundancy.
Option bytes can be modified in ICP mode (via SWIM) by accessing the EEPROM address
shown in Table 11: Option bytes below. Option bytes can also be modified ‘on the fly’ by the
application in IAP mode, except the ROP option that can only be modified in ICP mode (via
SWIM).
Refer to the STM8S Flash programming manual (PM0051) and STM8 SWIM
communication protocol and debug module user manual (UM0470) for information on SWIM
programming procedures.
Table 11. Option bytes
Addr.
Option
name
Option
byte no.
Option bits
Factory
default
setting
7654
3210
0x4800
Read-out
protection
(ROP)
OPT0
ROP[7:0]
0x00
0x4801
User boot code
(UBC)
OPT1
UBC[7:0]
0x00
0x4802
NOPT1
NUBC[7:0]
0xFF
0x4803
Alternate
function
remapping
(AFR)
OPT2
AFR7
AFR6
AFR5
Reserve
d
AFR3
AFR2
AFR1
AFR0
0x00
0x4804
NOPT2
NAFR7
NAFR6
NAFR5
NAFR4
NAFR3
NAFR2
NAFR1
NAFR0
0xFF
0x4805
Watchdog
option
OPT3
Reserved
LSI
_EN
IWDG
_HW
WWDG
_HW
WWDG
_HALT
0x00
0x4806
NOPT3
Reserved
NLSI
_EN
NIWDG
_HW
NWWDG
_HW
NWWDG
_HALT
0xFF
0x4807
Clock option
OPT4
Reserved
EXT
CLK
CKAWU
SEL
PRS
C1
PRS
C0
0x00
0x4808
NOPT4
Reserved
NEXT
CLK
NCKAW
USEL
NPR
SC1
NPR
SC0
0xFF
0x4809
HSE clock
startup
OPT5
HSECNT[7:0]
0x00
0x480A
NOPT5
NHSECNT[7:0]
0xFF
0x480B
Reserved
OPT6
Reserved
0x00
0x480C
NOPT6
Reserved
0xFF
0x480D
Flash wait
states
OPT7
Reserved
Wait
state
0x00
0x480E
NOPT7
Reserved
Nwait
state
0xFF
0x487E
Bootloader
OPTBL
BL[7:0]
0x00
0x487F
NOPTBL
NBL[7:0]
0xFF



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