ADA4098-1BUJZ-R5 datasheet(21/33 Pages) AD

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Data Sheet

ADA4098-1/ADA4098-2

THEORY OF OPERATION

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Rev. A | 21 of 33

INPUT PROTECTION

The inputs are protected against temporary voltage excursions to

20 V below –VS (see Figure 55) by internal 880 Ω resistors (see

Figure 54). These resistors limit the current in the series D1 diode

and D2 diode that are tied to the bases of the Q1 and Q2 tran-

sistors, respectively. Adding additional external series resistance

extends the protection to >20 V below −VS, at the cost of stability

and added thermal noise. The input stage of the ADA4098-1 and

ADA4098-2 incorporates phase reversal protection to prevent the

output from phase reversing for inputs below −VS. The ADA4098-1

and ADA4098-2 op amps do not have clamping diodes between

the inputs and can be differentially overdriven up to 80 V without

damage, inducing parametric shifts, or drawing appreciable input

current. Figure 56 summarizes the input fault types that can be

applied to the ADA4098-1 and ADA4098-2 without compromising

input integrity.

Figure 55. ADA4098-1 and ADA4098-2 as Unity-Gain Buffer with Noninverting

Input Driven Beyond the Supply (VSY = 5 V)

Figure 56. ADA4098-1 and ADA4098-2 Fault Tolerant Conditions

OVER-THE-TOP OPERATION

CONSIDERATIONS

When the ADA4098-1 and ADA4098-2 input common-modes are

biased near or >+VS supply, the amplifiers operate in the Over-The-

Top configuration. The differential input pair that controls amplifier

operation is the common base pair, Q3 to Q6 (see Figure 54).

Input bias currents change from <±700 pA in normal operation to

approximately 8 μA in Over-The-Top operation when the input stage

transitions from common emitter to common base. The Over-The-

Top input bias currents are well matched, and the associated offset

is typically <50 nA. Ensure that the impedance connected to the

inverting and noninverting inputs is well matched to avoid any input

bias current induced voltage offsets.

Differential input impedance, RIN (see Figure 57), decreases from

>1 MΩ in normal operation to ~7 kΩ in Over-The-Top operation

(see Table 1 and Table 2).

Figure 57. Difference Amplifier Configured for Normal Operation and Over-

The-Top Operation (RI Is a Gain Setting Resistor)

This RIN resistance appears across the summing nodes in Over-

The-Top operation due to the configuration of the common base

input stage.

The RIN value is derived from the specified IB that flows to the op

amp inputs, as expressed in the following equation:

RIN = 2kT/(qIB)

where:

k is Boltzmann’s constant.

T is the operating temperature.

q is the charge of an electron.

IB is the operating input bias current in Over-The-Top operation.

The inputs are biased proportional to absolute temperature. There-

fore, RIN is relatively constant with temperature. This resistance

appears across the summing nodes of the amplifier, which is forced

to 0 V differentially by the feedback action of the amplifiers and

can seem relatively harmless. However, depending on the configu-

ration, this input resistance can boost the noise gain, lower overall

amplifier loop gain and closed-loop bandwidth, and raise output

noise. The singular benefit of this configuration is an increase in

closed-loop amplifier stability.

In normal mode (−VS < VCM < +VS −1.25 V), RIN is typically large

compared to the value of the gain setting resistors (RF and RI), and

RIN can be ignored.

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