AD74413RBCPZ datasheet(52/70 Pages) AD

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AD74413R

Data Sheet

Rev. 0 | Page 52 of 70

Readback Mode

Two SPI frames are required to read a register location. In the

first frame, the address of the register to be read is written to the

READ_SELECT register. The second SPI frame consists of

either a no operation (NOP) command, another write to the

READ_SELECT register, or a write to any other register. The

contents of the selected register are available on the SDO during

the second frame. Figure 57 shows the timing diagram of the

two-stage readback.

During the second read frame, Bits[D30:D24] provide status

information on the SDO pin, as shown in Table 25 and Table 26.

The content of these bits is determined by setting the SPI_RD_

RET_INFO bit in the READ_SELECT register.

The data is shifted out MSB first. The MSB (Bit 31) is always set

to 1 to allow the SPI master to detect if the SDO line is stuck

low. If the SDO line is stuck low, a CRC of all 0s is calculated.

In this case, the master cannot detect a stuck low condition. By

tying the MSB high, the master can check this bit to detect a

stuck low fault by checking the MSB is 1. Only this MSB is

timed off the falling SYNC edge. All other bits are clocked out

on the SCLK rising edge.

2-STAGE READBACK

INPUT WORD SPECIFIES

*ALTERNATIVELY COULD

WRITE ANOTHER

2-STAGE READBACK

*NOP

NOP

SYNC

SCLK

SDI

SDO

UNDEFINED

SELECTED REGISTER DATA

CLOCKED OUT

*SELECTED REGISTER DATA

CLOCKED OUT

Figure 57. Two-Stage Readback Timing Diagram

Table 25. SDO Contents for a Read Operation when the SPI_RD_RET_INFO Bit = 0

MSB

LSB

D31

[D30:D24]

[D23:D8]

[D7:D0]

READBACK_ADDR[6:0]

Read data

CRC

Table 26. SDO Contents for a Read Operation when the SPI_RD_RET_INFO Bit = 1

MSB

LSB

D31

D30

D29

D28

[D27:D24]

[D23:D8]

[D7:D0]

ALERT

ADC_DATA_ RDY

DIN_COMP_OUT[3:0]

Read data

CRC

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