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ADAQ4003BBCZ Datasheet(PDF) 21 Page - Analog Devices

Part # ADAQ4003BBCZ
Description  18-Bit, 2 MSPS, 關Module Data Acquisition Solution
PDF  35 Pages
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Manufacturer  AD [Analog Devices]
Direct Link  http://www.analog.com
Logo AD - Analog Devices

ADAQ4003BBCZ Datasheet(HTML) 21 Page - Analog Devices

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Data Sheet
ADAQ4003
Rev. 0 | Page 21 of 35
0.1µF
0.1µF
10kΩ
VCMO
10kΩ
33Ω
33Ω
10µF
1nF
1nF
0.1µF
VS–
VCMO
MODE
GND
ADCIN+
ADCIN–
VDD = 1.8V
REF_OUT
REF = 5V
VS+ = 5.5V
2.2µF
VIO
SDI
SCK
SDO
CNV
OUT–
1kΩ
VCMO
1kΩ
1kΩ
1.1kΩ
1.1kΩ
1kΩ
IN–
IN+
OUT+
R1K–
R1K1–
R1K1+
R1K+
PD_AMP
PD_REF
ADC
+2.5V
EXAMPLE 3
–2.5V
0V
–7V
+7V
–7V
–7V
0V
+7V
+9.5V
EXAMPLE 2
G = 1
+4.5V
+7V
+0.5V
EXAMPLE 1
–4.5V
–2V
R1K+
R1K–
R1K+
R1K–
R1K+
R1K–
ADAQ4003
FDA
Figure 46. Differential Configuration with G = 1
0.1µF
0.1µF
10kΩ
VCMO
10kΩ
33Ω
33Ω
10µF
1nF
1nF
0.1µF
VS–
VCMO
MODE
GND
ADCIN+
ADCIN–
VDD = 1.8V
REF_OUT
REF = 5V
VS+ = 5.5V
2.2µF
VIO
SDI
SCK
SDO
CNV
OUT–
1kΩ
VCMO
1kΩ
1kΩ
1.1kΩ
1.1kΩ
1kΩ
IN–
IN+
OUT+
R1K–
R1K1–
R1K1+
R1K+
ADC
+1.3V
EXAMPLE 3
–1.3V
0V
–5V
+5V
–5V
–5V
0V
+5V
+6.3V
EXAMPLE 2
G = 1.9
+3.7V
+5V
+0V
EXAMPLE 1
–2.6V
–1.3V
R1K+
R1K–
R1K+
R1K–
R1K+
R1K–
ADAQ4003
FDA
PD_AMP
PD_REF
Figure 47. Differential Configuration with G = 1.9
ANALOG INPUTS
High Frequency Input Signals
The ADAQ4003 ac performance over a wide input frequency
range using a 5 V reference voltage is shown in Figure 21 and
Figure 24. The ADAQ4003 maintains exceptional ac performance
for input frequencies up to the Nyquist frequency with minimal
performance degradation.
EASE OF DRIVE FEATURES
Input Span Compression
The ADAQ4003 includes a span compression feature that
increases the headroom and footroom available to the ADC driver
by reducing the input range by 10% from the top and bottom of
the range while still accessing all available ADC codes. The SNR
decreases by approximately 1.9 dB (20 × log(8/10)) for the
reduced input range when span compression is enabled. Span
compression is disabled by default but can be enabled by writing to
the relevant register bit (see the Digital Interface section).
ADC High-Z Mode
The ADAQ4003 incorporates ADC high-Z mode, which reduces
the nonlinear charge kickback when the capacitor DAC
switches back to the input at the start of the acquisition. The
ADC high-Z mode is disabled by default but can be enabled by
writing to the register (see Table 14). Disable high-Z mode for
input frequencies above 100 kHz or when multiplexing.
Driving the ADAQ4003 Using a High Impedance PGIA
The majority of instrumentation and programmable gain
instrumentation amplifiers (PGIAs) are single-ended output,
which cannot directly drive the fully differential data
acquisition signal chain. However, the LTC6373 PGIA offers
fully differential outputs, low noise, low distortion, and high
bandwidth. The LTC6373 is dc-coupled on the input and the
output with programmable gain settings (using the A2, A1, and
A0 pins). These features enable the LTC6373 to drive the
ADAQ4003 directly in many signal chain applications without
sacrificing precision performance.



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