AD8065 datasheet(52/68 Pages) AD

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Data Sheet

AD3552R

REGISTERS

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Rev. A | 52 of 68

DAC REGISTER DETAILS

Reference Configuration Register

Address: 0x15, Reset: 0x00, Name: REFERENCE_CONFIG

This register controls the source and driving of the voltage reference.

Table 34. Bit Descriptions for REFERENCE_CONFIG

Bits

Bit Name

Settings

Description

Reset

Access

RESERVED

Reserved.

0x0

IDUMP_FASTMODE

IDUMP Buffer Fast Mode. Set this bit to increase the IDD of the IDUMP

buffer of the amplifier to allow for a greater gain bandwidth.

0x0

R/W

[5:2]

RESERVED

Reserved.

0x0

[1:0]

REFERENCE_VOLTAGE_SEL

Reference Voltage Selection. These two bits are used to select the

configuration of the reference voltage circuit.

0x0

R/W

00 Reference voltage generated internally. The VREF pin is floating.

01 Reference voltage generated internally and output on the VREF pin.

10 Reference voltage provided externally and input on the VREF pin.

11 Reference voltage provided externally and input on the VREF pin.

Error Alarm Mask Register

Address: 0x16, Reset: 0x00, Name: ERR_ALARM_MASK

This register selects which error conditions cause the assertion of the ALERT pin.

Table 35. Bit Descriptions for ERR_ALARM_MASK

Bits

Bit Name

Settings

Description

Reset

Access

RESERVED

Reserved.

0x0

AD8065 Datasheet(PDF) 52 Page - Analog Devices

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