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QPD0050PCB4B01 Datasheet(PDF) 2 Page - Qorvo, Inc |
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QPD0050PCB4B01 Datasheet(HTML) 2 Page - Qorvo, Inc |
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2 / 12 page ![]() QPD0050 75 W, 48 V, DC to 3.6 GHz, GaN RF Power Transistor Data Sheet Rev. C, February 2020 | Subject to change without notice 2 of 12 www.qorvo.com ® Recommended Operating Conditions Parameter Min Typ Max Units Gate Voltage (VG) −2.7 V Drain Voltage (VD) +48 V Quiescent Drain Current (IDQ) 130 mA Electrical specifications are measured at specified test conditions. Specifications are not guaranteed over all recommended operating conditions. Absolute Maximum Ratings Parameter Rating Breakdown Voltage (BVDG) +165 V Gate Voltage Range (VG) −7 to +2 V Drain Voltage (VD) +55 V Peak RF Input Power 35 dBm VSWR Mismatch, P1dB Pulse (20% Duty Cycle, 100 µs Width), T = +25°C 10:1 Exceeding any one or a combination of the Absolute Maximum Rating conditions may cause permanent damage to the device. Extended application of Absolute Maximum Rating conditions to the device may reduce device reliability. Electrical Specifications Parameter Conditions Min Typ Max Units Operational Frequency Range 2110 2170 MHz Quiescent Drain Current (IDQ) 130 mA Gain 3 dB Compression 17.5 19.5 dB Power (PSAT) 3 dB Compression 46.5 47.7 dBm Drain Efficiency 3 dB Compression 60.0 72.7 % Gate Leakage Vg = -3.8V, Vd = +10V -11.6 mA Test conditions unless otherwise noted: VD = +48 V, IDQ = 130 mA, T = +25°C, Pulse signal (20% Duty Cycle, 100 µs Width) at 2140 MHz on a Class AB single-ended reference design tuned for 2110-2170 MHz. Thermal Information Parameter Conditions Values Units Doherty Thermal Resistance, Peak IR Surface Temperature at Average Power (θJC) (1) (2) TCASE = +105°C, TCH = 113°C CW: PDISS = 8.5 W, POUT = 12.7 W 0.9 °C/W Device Thermal Resistance, Peak IR Surface Temperature at Average Power (θJC) TCASE = +105°C, TCH = 122°C CW: PDISS = 13.4 W, POUT = 3.5 W 1.3 °C/W Notes: 1. Based on expected carrier amplifier efficiency of Doherty. 2. POUT assumes 20% peaking amplifier contribution of total average Doherty rated power. 3. Thermal resistance is measured to package backside. 4. Refer to the following document: GaN Device Channel Temperature, Thermal Resistance, and Reliability Estimates |
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