AD2429KCPZ datasheet(2/38 Pages) AD

2 / 38 page

Rev. D

Page 2 of 38

May 2022

AD2420/AD2426/AD2427/AD2428/AD2429

TABLE OF CONTENTS

A2B Bus Features ..................................................... 1

A2B Transceiver Features ........................................... 1

Applications ........................................................... 1

Table of Contents ..................................................... 2

Revision History ...................................................... 2

General Description ................................................. 3

A2B Bus Details .................................................... 4

I2C Interface ........................................................ 5

I2S/TDM Interface ................................................ 5

Pulse Density Modulation (PDM) Interface ................. 6

GPIO Over Distance .............................................. 6

Mailboxes ........................................................... 6

Data Slot Exchange Between Subordinates .................. 6

Clock Sustain State ................................................ 6

Programmable Settings to Optimize EMC 

Performance ..................................................... 6

Specifications .......................................................... 8

Operating Conditions ............................................ 8

Electrical Characteristics ......................................... 9

Power Supply Rejection Ratio (PSRR) ...................... 11

Timing Specifications .......................................... 12

Power-Up Sequencing Restrictions ......................... 16

A2B Bus System Specification ................................. 17

PDM Typical Performance Characteristics ................ 18

Absolute Maximum Ratings .................................. 20

Thermal Characteristics ....................................... 20

ESD Caution ...................................................... 21

Test Circuits and Switching Characteristics ............... 21

Output Drive Currents ......................................... 21

Test Conditions .................................................. 22

Pin Configuration and Function Descriptions ............... 24

Power Analysis ...................................................... 28

Current Flow ...................................................... 28

VREG1 and VREG2 Output Currents ...................... 29

Current at VIN (IVIN) ........................................... 30

Power Dissipation ............................................... 30

Resistance Between Nodes ..................................... 30

Voltage Regulator Current in Main Node or Local 

Powered Subordinate Node ................................ 31

Power Dissipation of A2B Bus ................................. 31

Power Analysis of Bus Powered System .................... 31

Supply Voltage ................................................... 31

Reducing Power Consumption ............................... 32

Thermal Power ................................................... 32

Designer Reference ................................................. 33

VSENSE and Considerations for Diodes ....................... 33

Optional Add On Circuits ..................................... 33

Layout Guidelines ............................................... 34

Outline Dimensions ................................................ 36

Automotive Products .............................................. 37

Ordering Guide ..................................................... 38

REVISION HISTORY

5/2022—Rev. C to Rev. D

Analog Devices is in the process of updating documentation to

provide terminology and language that is culturally appropriate.

This is a process with a wide scope and will be phased in as

quickly as possible. Thank you for your patience.

Changes to I2C Interface ............................................5

Corrected typographical error in Unit column for fSYSBCLK

parameter from kHz to Hz in Table 3, 

Clock and Reset Timing ........................................... 12

Added tSYSBCLK parameter to Table 3, 

Clock and Reset Timing ........................................... 12

Added Figure 9, PDM Timing .................................... 12

Added Footnotes 2 and 4 to Table 7, I2S Timing ............. 14

Clarification to System ESD Rating in Table 9, A2B System

Specifications ......................................................... 17

Clarified captions for Figure 15, Figure 16, Figure 18, and 

Figure 19 in PDM Typical Performance Characteristics ....18

Clarifications to Parameter and Conditions columns in Table

11, PDM Interface Performance Specifications ...............19

Clarification to System ESD Rating CON1-A and CON1-B 

Terminals in Table 12, Absolute Maximum Ratings .........20

Clarifications to Thermal Characteristics .......................20

Clarified captions for Figure 21, Figure 22, Figure 25, and 

Figure 26 in Output Drive Currents .............................21

Corrected graph line symbols for Figure 21 in 

Output Drive Currents .............................................21

Clarified captions for Figure 30, Figure 31, Figure 32, and 

Figure 33 in Capacitive Loading ..................................23

Changes to Table 15,

AD2420/AD2426/AD2427/AD2428/AD2429 Pin Function

Descriptions ...........................................................24

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