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ZSSC3281 Datasheet(PDF) 13 Page - Renesas Technology Corp |
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ZSSC3281 Datasheet(HTML) 13 Page - Renesas Technology Corp |
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13 / 102 page ![]() ZSSC3281 Datasheet R33DS0020ED0100 Rev. 1.0 Jun.13.22 Page 13 © 2022 Renesas Electronics Symbol Parameter Conditions Minimum Typical Maximum Units 5V absolute Voltage Mode 5 1 10V absolute Voltage Mode 5 1 IOUTMAX Short current limit at pin AOUT AOUT modes using 5V Buffer short to VDD or VSS programmable in 4 steps 3 8 15 20 5 12 19 25 9 20 23 30 mA mA mA mA Cload Load capacitance at AOUT 2-Wire Current Loop Mode 2 nF all other modes (for example. cap for EMC: 33nF, ECU load: 10nF) 50 rDAC Resolution – 16 – Bit Programmable-Gain Amplifier (PGA) Gamp Gain 120 steps 1.32 – 495 V/V Gerr Gain error Referenced to nominal gain Gain = 1.32…5 Gain = 6…125 Gain = 126…495 -2.5 -5 -10 0 2.5 5 10 % GerrTemp Gain error over- temperature Temperature compensated sensors do not require calibration over- temperature. -0.2 0.2 % VCMin Supported input common mode 0.2 0.5 0.7 VTOP Vioffsc Differential input offset shift Programmable in 30 steps Gain1 < 240 Gain1 > 240 -28 -22 0 0 28 22 mV Sensor Signal Conditioning (SSC) Performance fSSCout Output (update) rate 3 measurements: signal+, signal-, diagnosis rADC = 16bit SSC-corrected digital output – 1.3 – kHz 3 measurements: signal+, signal-, diagnosis rADC = 14bit SSC-corrected digital output – 2.245 – kHz 2 measurements: signal+, diagnosis rADC = 14bit SSC-corrected digital output – 3.36 – kHz tstepresp Step response 3 measurements: signal+, signal-, diagnosis rADC = 16bit SSC-corrected digital output 1.38 ms 3 measurements: signal+, signal-, diagnosis rADC = 14bit SSC-corrected digital output 0.84 ms Analog Inputs VINP, VINN Absolute sensor input Voltages at INP and INN pin; resulting minimum/maximum differential voltages: -800mV < VINdiff < 800mV 0.2 – 1.2 V 1 VDD must be ≥ 5.25V |
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