XRT82L24 datasheet(13/43 Pages) EXAR

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XRT82L24

QUAD E1 LINE TRANSCEIVER WITH CLOCK RECOVERY AND JITTER ATTENUATOR

REV. 1.2.3

Degraded Type of Loss of Signal Event (Non-Zero

Amplitude)

If the XRT 82L24 experiences a degraded type of

LOS event (e.g., where there is still a small amount of

discernible signal amplitude in the line signal, but

small enough to qualify as an LOS event) then the

Clock Recovery PLL could lock onto this degraded

line signal and will subsequently drive the same fre-

quency via the RxClk output pins.

CONDITIONS FOR DECLARING AND CLEARING

LOS IN THE E1 MODE.

Each E1 channel of the XRT 82L24 has two criteria

for LOS Detection, Analog and Digital. A channel will

declare a LOS condition when both of these LOS De-

tectors detect an LOS condition.

Analog LOS Detector

The Analog LOS Detector will declare an LOS condi-

tion, if it determines that the amplitude of the incom-

ing line signal has dropped to less than

-15dB (below the nominal pulse amplitude of 3V for

twisted-pair, or 2.37V for coaxial-cable) for at least

32 bit-periods.

The Analog LOS Detector will clear the LOS condi-

tion, if it determines that the incoming line signal is no

more than 12.5dB below the nominal 3V pulse ampli-

tude.

NOTE: The difference in the signal level required to declare

and clear LOS is 2.5dB. This 2.5dB hysteresis is designed

into the Analog LOS Detector circuitry, in order to prevent

chattering in the LOS output pin or bit-field.

Digital LOS Detector

The Digital LOS Detector will declare an LOS condi-

tion, if it detects a string of at least 32 consecutive

"0"s.

The Digital LOS Detector will clear the LOS condition,

if it determines that the incoming E1 line signal has a

pulse density of 12.5% or more without 16 consecu-

tive “0’s” for at least 32 consecutive bit periods.

NOTE: The pulse density requirement of 12.5% accounts

for HDB3 coding.

RECEIVE DATA MUTING

The XRT 82L24 permits the user to “MUTE” the re-

covered data output signals anytime the LOS condi-

tion is declared. If the user invokes this function, then

the RPOS/RDAT and RNEG output pins will be pulled

to GND for the duration that the LOS condition exists.

This feature is useful in that it prevents the LIU from

routing electrical noise (which has been “recovered”

by the Clock Recovery PLL) to the Framer IC and pre-

venting it from declaring an LOS condition. This fea-

ture is enabled by setting the RXMUTE bit to a “1” in

the Host Mode (Register 1, Bit 2 Location) or by con-

necting pin 67 High in the Hardware Mode.

LOOP-BACK MODES

Each channel within the XRT 82L24 can be config-

ured to operate in any of the following loop-back

modes:

• Remote Loop-Back Mode

• Digital Local Loop-Back Mode

• Analog Local Loop-Back Mode

Each of these loop-back modes are described in

some detail below.

REMOTE LOOP-BACK (RLOOP) MODE

With Remote Loop-Back activated, (Channel Control

Mode with LoopSEL (pin 58) tied Low and LoopEN

tied High received data after the jitter attenuator (if

selected) is looped back to the transmit path using

RxClk as transmit timing. In this mode the data/sig-

nals applied to the TxClk, TPOS/TDAT and TNEG in-

put pins are ignored, while RxClk and received data

will continue to be available at their respective output

pins. Simultaneously setting RLOOP and ALOOP ac-

tive is not allowed (see Loop-Back Mode in Figure 4 &

Figure 5). Remote loop-back has priority over TAOS.

DIGITAL LOCAL LOOP-BACK (DLOOP) MODE

The Digital Local Loop-Back mode allows the trans-

mit clock and data to be looped back to the corre-

sponding receiver output pins through the encoder/

decoder and the jitter attenuator. In this mode, the re-

ceive line signal is ignored, but the transmit data will

be sent to the line uninterrupted. This loop back fea-

ture allows users to configure the line interface as a

pure jitter attenuator. (see Loop-Back Mode in

Figure 6 & Figure 7).

NOTE: Digital Local Loop-Back is not supported in Hard-

ware Mode.

ANALOG LOCAL LOOP-BACK (ALOOP) MODE

With Analog Local Loop-Back activated, the transmit

data at TTIP and TRING are looped-back to the ana-

log input of the receiver. External inputs at RTIP/

RRING in this mode are ignored while valid transmit

data continues to be sent to the line. Analog Loop-

Back exercises most of the functional blocks of the

line interface (see Loop-Back Mode in Figure 8 &

Figure 9).

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