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STNRG011ATR Datasheet(PDF) 22 Page - STMicroelectronics |
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STNRG011ATR Datasheet(HTML) 22 Page - STMicroelectronics |
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22 / 31 page ![]() In case of the LLC_AUX pin driven burst mode, two types of external burst mode could be defined: • Pure external burst mode: only the external BM comparator manages the burst mode entering / exiting; • Hybrid external burst mode: if the external BM comparator is high, the system stays out of burst mode while if the external BM comparator is low, burst mode entering / exiting is managed by the LLC_FB pin settings. In both external burst mode cases, the burst switching activity is anyway managed by the LLC_FB pin and the burst comparator. The PFC and LLC switching activities during the burst-mode are synchronized. The LLC can perform a burst without the PFC, depending on the system conditions. 10.11 Communication and configuration The device communicates with an external digital device through a serial interface. The serial interface uses two dedicated pins with a standard UART protocol. It implements also an I2C protocol for external E2PROM writing and reading. The serial interface allows the user to: • write the NVM to configure the device in a specific application: 20 bytes are available. • write into the RAM for test and SW patch purpose • read the NVM content • read the RAM content • read register content • configure the device for specific tests Based on a specific code into the NVM the serial interface functionality can be reduced for security reasons. 10.11.1 Monitor Some internal data can be provided to an external digital device trough the UART interface for monitoring purposes. 10.11.2 Black box Black box data are written into the external E2PROM during the normal operation. 10.11.3 Patches SW patches (if necessary) are uploaded by the device from the external E2PROM at the startup. Maximum patch size is 2.5 kB. STNRG011A Communication and configuration DS13973 - Rev 2 page 22/31 |
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