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ESP32-S2 Datasheet(PDF) 4 Page - ESPRESSIF SYSTEMS (SHANGHAI) CO., LTD.

Part # ESP32-S2
Description  SoC with Xtensa® SingleCore 32bit LX7 Microprocessor Supporting IEEE 802.11b/g/n (2.4 GHz WiFi)
PDF  51 Pages
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Manufacturer  ESPRESSIF [ESPRESSIF SYSTEMS (SHANGHAI) CO., LTD.]
Direct Link  https://www.espressif.com/
Logo ESPRESSIF - ESPRESSIF SYSTEMS (SHANGHAI) CO., LTD.

ESP32-S2 Datasheet(HTML) 4 Page - ESPRESSIF SYSTEMS (SHANGHAI) CO., LTD.

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between communication range, data rate and power
consumption.
The device provides a rich set of peripheral interfaces
including SPI, I2S, UART, I2C, LED_PWM, LCD
interface, camera interface, ADC, DAC, touch sensor,
temperature sensor, as well as 43 GPIOs. It also
includes a full-speed USB On-The-Go (OTG) interface
to enable USB communication.
ESP32-S2 series of SoC has several dedicated
hardware security features. Cryptographic
accelerators are integrated for AES, SHA and RSA
algorithms. Additional hardware security features are
provided by the RNG, HMAC and Digital Signature
modules as well as flash encryption and secure boot
signature verification features. These features allow the
device to meet stringent security requirements.
Features
Wi­Fi
• IEEE 802.11 b/g/n-compliant
• Supports 20 MHz, 40 MHz bandwidth in 2.4
GHz band
• Single-band 1T1R mode with data rate up to
150 Mbps
• WMM
• TX/RX A-MPDU, RX A-MSDU
• Immediate Block ACK
• Fragmentation and defragmentation
• Automatic Beacon monitoring (hardware TSF)
• 4 × virtual Wi-Fi interfaces
• Simultaneous support for Infrastructure Station,
SoftAP, and Promiscuous modes
Note that when ESP32-S2 is in Station mode and
performs a scan, the SoftAP channel will change
along with the Station channel.
• Antenna diversity
• 802.11mc FTM
• Supports external power amplifier
CPU and Memory
• Xtensa® single-core 32-bit LX7 microprocessor,
up to 240 MHz
• CoreMark® score:
– 1 core at 240 MHz: 472.73 CoreMark; 1.97
CoreMark/MHz
• 128 KB ROM
• 320 KB SRAM
• 16 KB SRAM in RTC
• Embedded flash and PSRAM (see details in
Chapter 1: ESP32-S2 Series Comparison)
• SPI/QSPI/OSPI supports multiple flash and
external RAM chips
• Access to flash accelerated by cache
• Supports flash in-Circuit Programming (ICP)
Advanced Peripheral Interfaces
• 43 × programmable GPIOs
• Digital interfaces:
– 4 × SPI
– 1 × I2S
– 2 × I2C
– 2 × UART
– 1 × RMT (TX/RX)
– LED PWM controller, up to 8 channels
– 4 × pulse counters
– 1 × full-speed USB OTG
– 1 × DVP 8/16 camera interface,
implemented using the hardware resources
of I2S
– 1 × LCD interface (8-bit serial
RGB/8080/6800), implemented using the
hardware resources of SPI2
– 1 × LCD interface (8/16/24-bit parallel),
Espressif Systems
4
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ESP32-S2 Series Datasheet v1.4



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