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MPFS250T-1FCVG484E Datasheet(PDF) 39 Page - Microchip Technology |
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MPFS250T-1FCVG484E Datasheet(HTML) 39 Page - Microchip Technology |
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39 / 50 page  5.2.1 Dedicated SPI Programming Port To facilitate the use of various programming modes, PolarFire SoC FPGAs share dedicated SPI port pins between the system controller and user logic embedded in the FPGA. User logic must instantiate the User SPI macro to gain access to the pins from their design. The SPI port pins can be used as a master or slave programming port based on the signal level on the dedicated SPI mode pin. The dedicated SPI Enable pin also allows an external SPI master to program the on-board SPI flash without an external MUX by tri-stating the SPI MOSI/MISO/SS/CLK pins on the PolarFire SoC FPGA. The following illustration shows the SPI port facilitating the use of various programming modes. Figure 5-1. SPI Programming Port FPGA Fabric System Controller SPI Port Pins MISO/MOSI/SS/CLK SPI Enable SPI Mode SPI Flash External SPI Master PolarFire® SoC FPGA System Controller © 2021 Microchip Technology Inc. and its subsidiaries Overview DS60001656C-page 39 |
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