AS7421 datasheet(33/53 Pages) AMSCO

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AS7421

Datasheet

• PUBLIC

DS000667

• v1-00 • 2022-Aug-25

│ 32

10.2.2

LTF_ITIME Register (Address 0x61, 0x62, 0x63)

is set as follows:

�� = (��_�� + 1) ×

��_��

Figure 28:

LTF_ITIME_L Register

Addr: 0x61

LTF_ITIME_L

Bit

Bit Name

Default

Access

Bit Description

7:0

LTF_ITIME

Integration time

Low byte of integration time. Do not change during

LTF_EN = “1”

Figure 29:

LTF_ITIME_M Register

Addr: 0x62

LTF_ITIME_M

Bit

Bit Name

Default

Access

Bit Description

15:8

LTF_ITIME

Integration time

Middle byte of integration time. Do not change during

LTF_EN = “1”

Figure 30:

LTF_ITIME_H Register

Addr: 0x63

LTF_ITIME_H

Bit

Bit Name

Default

Access

Bit Description

23:16

LTF_ITIME

Integration time

High byte of integration time. Do not change during

LTF_EN = “1”

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