Pin description

STA5635A

8/20

DS12858 Rev 2

1.4

IO configurations

Eight of IO digital pin can have different functions. All functions are described in the Table 2.

Each pin can be configured one by one by using SPI Register #52.

Table 2. Digital pin function

Main Name

Description/function

Supply

domain

Type

MCLK / Q_Sign2

Digital interface clock (clock decimator filter)

1.8/3.3 V

Digital

Q-sign data of Secondary main

Enable / Q_Sign1

Enable for digital interface

1.8/3.3 V

Digital

Q-sign data of main chain

Digital

Q_Mag1

Q-mag data of main chain

1.8/3.3 V

Digital

D(0) / I_Sign1

I-sign and I-mag data of main chain

1.8/3.3 V

Digital

I-sign data of main chain

Sign data real of main chain

D(1) / I_Mag1

Q-sign and Q-mag data of main chain

1.8/3.3 V

Digital

I-mag data of main chain

Mag data real of main chain

D(2) / Q_Mag2

Q-mag data of secondary chain

1.8/3.3 V

Digital

GNSS Clock (64fo)

D(3) / I_Sign2

I-sign and I-mag data of secondary chain

1.8/3.3 V

Digital

I-sign data of secondary chain

Sign data real of secondary chain

D(4) / I_Mag2

Q-sign and Q-mag data of secondary chain

1.8/3.3 V

Digital

I-mag data of secondary chain

Mag data real of secondary chain

TCXO_CLK

TCXO output buffered signal at VCC_IO

1.8/3.3 V

Digital

TCXO output buffered signal at 1V1

CLK 64f0 (out of H divider) at VCC_IO

MCLK at VCC_IO (clock decimator filter)