STA8089GAT datasheet(11/33 Pages) STMICROELECTRONICS

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DS11777 Rev 4

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STA8089GAT

Pin description

2.6

Communication interface pins

TP_IF_N

1.2 V

Diff.Test Point for IF – Neg.

TP_IF_P

1.2 V

Diff.Test Point for IF – Pos.

Table 4. Test/emulated dedicated pins (continued)

Symbol

I/O

voltage

I/O

Description

STA8089GAT

Table 5. Communication interface pins

Symbol

I/O

voltage

I/O

Alternative

function

Function

Description

SQI_CLK

VDDIO_R1

AF2 (default)

SQI_CLK

SQI Flash clock

—

AF0, AF1, AF3

Reserved

SQI_CEN

VDDIO_R1

AF2 (default)

SQI_CEN

SQI Flash chip enable

—

AF0, AF1, AF3

Reserved

SQI_SIO0/SI

VDDIO_R1

I/O

AF2 (default)

SQI_SIO0/SI

SQI Flash data IO 0 / ser. I/ BOOT2

—

AF0, AF1, AF3

Reserved

SQI_SIO1/SO VDDIO_R1

I/O

AF2 (default)

SQI_SIO1/SO SQI Flash data IO 1 / ser. O

—

AF0, AF1, AF3

Reserved

SQI_SIO2

VDDIO_R1

I/O

AF2 (default)

SQI_SIO2

SQI Flash data IO 2

—

AF0, AF1, AF3

Reserved

SQI_SIO3

VDDIO_R1

I/O

AF2 (default)

SQI_SIO3

SQI Flash data IO 3 / BOOT1

—

AF0, AF1, AF3

Reserved

CAN1_TX

VDDIO_R2

AF0

I2C_CLK

I2C clock

I/O

AF1

GPIO8

General purpose I/O #8

AF2 (default)

CAN1_TX

CAN1 transmit data output

—

AF3

Reserved

CAN1_RX

VDDIO_R2

I/O

AF0

I2C_SD

I2C serial data

I/O

AF1

GPIO9

General purpose I/O #9

I/O

AF2 (default)

CAN1_RX

CAN1 receive data input

—

AF3

Reserved

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