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TMUX7436F Datasheet(PDF) 3 Page - Texas Instruments |
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TMUX7436F Datasheet(HTML) 3 Page - Texas Instruments |
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3 / 47 page ![]() 5 Pin Configuration and Functions 1 SEL1 16 SF 2 S1A 15 FF 3 D1 14 EN 4 S1B 13 VDD 5 VSS 12 S2B 6 GND 11 D2 7 NC 10 S2A 8 DR 9 SEL2 Not to scale Figure 5-1. PW Package, 16-Pin TSSOP (Top View) 1 D1 12 EN 2 S1B 11 VDD 3 VSS 10 S2B 4 GND 9 D2 Not to scale Thermal Pad Figure 5-2. RRP (Preview) Package, 16-Pin WQFN (Top View) Table 5-1. Pin Functions PIN TYPE(1) DESCRIPTION NAME TSSOP WQFN(2) D1 3 1 I/O Drain pin 1. Can be an input or output. The drain pin is not overvoltage protected. D2 11 9 I/O Drain pin 2. Can be an input or output. The drain pin is not overvoltage protected. DR 8 5 I Drain Response (DR) input. Tying the DR pin to GND enables the drain to be pulled to VDD or VSS through a 40 kΩ resistor during an overvoltage fault event. The drain pin becomes open circuit when the DR pin is a logic high or left floating. EN 14 12 I Active high logic enable (EN) pin, has internal 4 MΩ pull-down resistor. The device is disabled and all switches become high impedance when the pin is low. As provided in Table 8-1, when the pin is high, the SELx logic inputs determine individual switch states. FF 15 13 O General fault flag. This pin is an open drain output and is asserted low when overvoltage condition is detected on any of the source (Sxy) input pins. Connect this pin to an external supply (1.8 V to 5.5 V) through a 1 kΩ pull-up resistor. GND 6 4 P Ground (0 V) reference N.C. 7 7 — No internal connection. This pin can be shorted to GND or left floating. S1A 2 16 I/O Overvoltage protected source pin 1A. Can be an input or output. S1B 4 2 I/O Overvoltage protected source pin 1B. Can be an input or output. S2A 10 8 I/O Overvoltage protected source pin 2A. Can be an input or output. S2B 12 10 I/O Overvoltage protected source pin 2B. Can be an input or output. SEL1 1 15 I Logic control input 1. SEL2 9 6 I Logic control input 2. SF 16 14 O Specific fault flag. This pin is an open drain output and is asserted low when an overvoltage condition is detected on a specific (Sxy) input pin, depending on the state of the SELx pins, as provided in Table 8-1. Connect this pin to an external supply (1.8 V to 5.5 V) through a 1 kΩ pull-up resistor. VDD 13 11 P Positive power supply. This pin is the most positive power-supply potential. Connect a decoupling capacitor ranging from 0.1 µF to 10 µF between VDD and GND for reliable operation. VSS 5 3 P Negative power supply. This pin is the most negative power-supply potential. This pin can be connected to ground in single-supply applications. Connect a decoupling capacitor ranging from 0.1 µF to 10 µF between VSS and GND for reliable operation. Thermal Pad — The thermal pad is not connected internally. It is recommended to tie the pad to GND or VSS for best performance. (1) I = input, O = output, I/O = input and output, P = power. (2) Preview package. www.ti.com TMUX7436F SCDS459 – OCTOBER 2022 Copyright © 2022 Texas Instruments Incorporated Submit Document Feedback 3 Product Folder Links: TMUX7436F |
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