Features

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AEC-Q100 automotive qualification on going

•

SR6 integration MCUs:

–

Have superior real-time and safe performance (with highest ASIL-D

capability)

–

Bring HW based virtualization technology to MCUs for simplified multiple

SW integrations at optimized performance

–

Have built-in fast and cost effective OTA reprogramming capability (with

built-in dual image storage)

–

Offer high speed security cryptographic services, for example for

network authentication

Cores

•

–

‑R52+ cores (4 of them with checker cores, 2 in split-lock

configuration) allowing usage as either 6 cores (4 of them in lockstep

configuration) or 5 cores (all of them in lockstep configuration), single

precision FPU, new privilege level for real-time virtualization

–

2 NEON extensions (for example SIMD, dual precision FPU)

•

‑M4 multipurpose accelerators (data move and [pre]-processing).

One in lockstep configuration

•

4 eDMA engines in lockstep configuration

Memories

•

Up to 20 MB on-chip NVM non-volatile memory:

–

PCM (phase change memory) as non-volatile memory

–

19.5 MB code NVM, with embedded memory replication for OTA (over-

the-air) reprogramming with up to 2x 19.5 MB

–

512 KB HSM dedicated code NVM

•

640 KB data NVM (512 KB + 128 KB dedicated to HSM)

•

Up to 8400 KB on-chip general-purpose SRAM

FPBGA 516

(25 x 25 mm)

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FPBGA 292

(17 x 17 mm)

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Part number

Package

SR6P7C8

FPBGA 516

SR6P7C4

FPBGA 292

‑R52+ automotive integration MCU

‑R52+ cores, 20 MB NVM (2x 19.5 MB “OTA X2”)

8.2 MB RAM, with embedded virtualization, safety and security

SR6P7C8, SR6P7C4

Data brief

DB4504 - Rev 5 - October 2022

For further information contact your local STMicroelectronics sales office.

www.st.com