ICS94235

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Brief I

Programmable System Frequency Generator

Register Name

Byte

Description

PWD Default

Functionality & Frequency

Select Register

0

Output frequency, hardware / I

2

C

frequency select, spread spectrum &

output enable control register.

See individual

byte description

Output Control Registers

1-6

Active / inactive output control

registers/latch inputs read back.

See individual

byte description

Vendor ID & Revision ID

Registers

7

Byte 11 bit[7:4] is ICS vendor id - 1001.

Other bits in this register designate device

revis ion ID of this part.

See individual

byte description

Byte Count

Read Back Register

8

Writing to this register will configure

byte count and how many byte will be

Watchdog Timer

Count Register

9

Writing to this register will configure the

number of seconds for the watchdog

timer to reset.

Watchdog Control Registers 10 Bit [6:0]

Watchdog enable, watchdog status and

programmable ’safe’frequency’ can be

configured in this register.

000,0000

VCO Control Selection Bit

10 Bit [7]

This bit select whether the output

frequency is control by hardware/byte 0

configurations or byte 11&12

programming.

0

VCO Frequency Control

Registers

11-12

Thes e registers control the dividers ratio

into the phase detector and thus control

the VCO output frequency.

Depended on

hardware/byte 0

configuration

Spread Spectrum Control

Registers

13-14

These registers control the spread

percentage amount.

Depended on

hardware/byte 0

configuration

Group Skews Control

Registers

15-16

Increment or decrement the group skew

amount as compared to the initial skew.

See individual

byte description

Output Rise/Fall Time

Select Registers

17-20

These registers will control the output

rise and fall time.

See individual

byte description