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DPS1133FIA-13 Datasheet(PDF) 2 Page - Diodes Incorporated

Part # DPS1133FIA-13
Description  24V/3A 1-CH POWER SWITCH WITH FAST ROLE SWAP
PDF  16 Pages
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Manufacturer  DIODES [Diodes Incorporated]
Direct Link  http://www.diodes.com
Logo DIODES - Diodes Incorporated

DPS1133FIA-13 Datasheet(HTML) 2 Page - Diodes Incorporated

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DPS1133
Document number: DS39393 Rev.11 - 2
2 of 16
www.diodes.com
December 2019
© Diodes Incorporated
DPS1133
Typical Application Circuit
DPS1133
1
2
3
4
5
6
IN
IN
IN
EN
FRS
GND
17
16
15
14
13
12
OUT
OUT
OUT
VLIM
ILIM
DV/DT
RVLIM
220k
Ω
RILIM
30k
Ω
CDV/DT
6.8nF
COUT
10
μF
CIN
10
μF
RPU
10k
Ω
3.3V
OFF
ON
VEN
VFRS
CVREG
0.1
μF
VIN
VOUT
SRC
RIMON
100k
Ω
DOUT
Schottky
Diode
CIMON
100pF
CFLT
0.1uF
RFRS
*Optional, dependent on system requirement
*
*
Pin Descriptions
Pin Number
Pin Name
Type
Function
1, 2, 3
IN
P
Power Supply and Input port.
4
EN
I
Enable Input. Active high
. ‘0’ = Device OFF; ‘1’ = Device ON. This pin must not be left floating.
5
FRS
I
Fast Role Swap Control. This pin enables the Fast Role Swap sequence defined in the USB Power
Delivery Specification Release 3.0, V1.0a.
6
GND
GND
Device Ground.
7
VREG
I/O
Voltage Regulator. A 0.1µF is recommended between this pin and GND.
8
DISC1
I
IN Port Discharge Control
. ‘1’ = port voltage to be discharged; ‘0’ = disabled.
9
DISC2
I
OUT Port Discharge Control
. ‘1’ = port voltage to be discharged; ‘0’ = disabled.
10
FAULTB
O
Fault Status Indicator. An external pull-up resistor is required. This active-low pin is tied to GND
when not used.
11
IMON
O
Current Monitor. A 100pF capacitor and a resistor connected in parallel between this pin and GND
creates a positive average voltage proportional to the current flowing through the device. This pin
can be left floating if current monitoring is not needed.
12
DV/DT
I/O
Ramp-up Control. A capacitor between this pin and GND sets the ramp-up rate.
13
ILIM
I/O
Current Limit Setting. A resistor between this pin and GND sets the overcurrent limit of the OUT
port.
14
VLIM
I/O
Voltage Limit Setting. A resistor between this pin and GND sets the over-voltage limit of the IN port.
15, 16, 17
OUT
O
Output Port.
18
(Exposed Pad)
SRC
I/O
Common Source. The exposed pad of the V-QFN4040-17 package must not be connected to any
signal.
0.1
F



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