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ESD751 Datasheet(PDF) 9 Page - Texas Instruments |
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ESD751 Datasheet(HTML) 9 Page - Texas Instruments |
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9 / 25 page ![]() 7.3.3 Dynamic Resistance The I/O pins feature an ESD clamp that have a low RDYN of 0.48 Ω for the ESD1LIN24-Q1, 0.6 Ω for the ESD751-Q1, and 0.58 Ω for the ESD761-Q1. 7.3.4 DC Breakdown Voltage The DC breakdown voltage between the I/O pins is a minimum of ± 25.5 V. This shields sensitive equipment from surges above the reverse standoff voltage of ± 24 V. 7.3.5 Ultra Low Leakage Current The I/O pins feature an ultra-low leakage current of 50 nA (maximum) with a bias of ± 24 V. 7.3.6 Clamping Voltage The I/O pins of the ESD1LIN24-Q1 feature an ESD clamp that is capable of clamping the voltage to 37 V ( IPP = 4.3 A) and 37.7 V (IPP = 16 A for TLP). The I/O pins of the ESD751-Q1 feature an ESD clamp that is capable of clamping the voltage to 36.5 V (IPP = 2.8 A) and 39.7 V (IPP = 16 A for TLP). The I/O pins of the ESD761-Q1 feature an ESD clamp that is capable of clamping the voltage to 36.3 V (IPP = 1.8 A) and 39.3 V (IPP = 16 A for TLP). 7.3.7 Industry Standard Packages The ESD1LIN24-Q1 and ESD751-Q1 feature industry standard SOD-323 (DYF) and SOD-523 (DYA) leaded packages for automatic optical inspection (AOI). The ESD761-Q1 is offered in the leadless X1SON (DPY) package 7.4 Device Functional Modes The ESD1LIN24-Q1, ESD751-Q1, and ESD761-Q1 are single channel passive clamps that have low leakage during normal operation when the voltage between I/O and GND is below VRWM, and activate when the voltage between I/O and GND goes above VBR. During ISO 10605 ESD events, transient voltages from ±30 kV to ±15 kV can be clamped on either channel. When the voltages on the protected lines fall below the VHOLD, the device reverts back to the low leakage passive state www.ti.com ESD1LIN24-Q1, ESD751-Q1, ESD761-Q1 SLVSGS4B – SEPTEMBER 2022 – REVISED NOVEMBER 2022 Copyright © 2022 Texas Instruments Incorporated Submit Document Feedback 9 Product Folder Links: ESD1LIN24-Q1 ESD751-Q1 ESD761-Q1 |
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