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MB95F108AS Datasheet(PDF) 13 Page - fujitsu semiconductor |
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MB95F108AS Datasheet(HTML) 13 Page - fujitsu semiconductor |
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13 / 59 page ![]() MB95100A Series 13 ■ HANDLING DEVICES • Preventing Latchup Care must be taken to ensure that maximum voltage ratings are not exceeded when they are used. Latchup may occur on CMOS ICs if voltage higher than VCC or lower than VSS is applied to input and output pins other than medium- and high-withstand voltage pins or if higher than the rating voltage is applied between VCC and VSS. When latchup occurs, power supply current increases rapidly and might thermally damage elements. Also, take care to prevent the analog power supply voltage (AVCC, AVR) and analog input voltage from exceeding the digital power supply voltage (VCC) when the analog system power supply is turned on or off. • Stable Supply Voltage Supply voltage should be stabilized. A sudden change in power-supply voltage may cause a malfunction even within the guaranteed operating range of the Vcc power-supply voltage. For stabilization, in principle, keep the variation in Vcc ripple (p-p value) in a commercial frequency range (50 Hz to 60 Hz) not to exceed 10% of the Vcc value and suppress the voltage variation so that the transient variation rate does not exceed 0.1 V/ms during a momentary change such as when the power supply is switched. • Treatment of Unused Input Pin An unused input pin may cause a malfunction if it is left open. It should be connected to a pull-up or pull-down resistor. • Treatment of Power Supply Pins on A/D Converter Connect to be AVCC = VCC and AVSS = AVR = VSS even if the A/D converter is not in use. • Precautions for Use of External Clock Even when an external clock is used, oscillation stabilization wait time is required for power-on reset, wake-up from subclock mode or stop mode. • Precaution against Noise to the External Reset Pin (RST) An input of a reset pulse below the specified level to the external reset pin (RST) may cause malfunctions. Be sure not to allow an input of a reset pulse below the specified level to the external reset pin (RST). |
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