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ISL68236IRAZ Datasheet(PDF) 30 Page - Renesas Technology Corp

Part # ISL68236IRAZ
Description  Digital Dual Output, 9-Phase PWM Controller
PDF  107 Pages
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Manufacturer  RENESAS [Renesas Technology Corp]
Direct Link  http://www.renesas.com
Logo RENESAS - Renesas Technology Corp

ISL68236IRAZ Datasheet(HTML) 30 Page - Renesas Technology Corp

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ISL68225, ISL68236
6. Fault Monitoring and Protection
R16DS0047EU0100 Rev.1.00
Page 30 of 106
Oct.1.20
6.3
Output Overcurrent Protection
The ISL68225 and ISL68236 provide a comprehensive overcurrent protection scheme that monitors the total
output current, peak phase current, and the valley phase current. The scheme allows you to eliminate inductor
saturation and limit the total output current. The ISL68225 and ISL68236 support shutdown and retry response
types for OC faults. The response configuration applies to all output current fault mechanisms such as phase
peak overcurrent and total output overcurrent.
Figure 21 shows the block diagram of the output overcurrent protection scheme.
Phases are protected from both overcurrent and undercurrent using a pulse-by-pulse scheme that acts instantly
on a PWM signal if a detected phase current reaches its threshold. Thresholds for overcurrent and undercurrent
allow you to precisely limit phase currents so the inductors never saturate. Phase current limiting behavior can be
configured to either shut down the device after a user-determined number of consecutive events or continue
indefinitely. If configured to continue indefinitely, the converter behaves much like a current source. Figures 22
and 23 show per-phase current limiting when the device is configured to shut down after a user-determined
number of consecutive events.
In addition to phase based current limiting, the ISL68225 and ISL68236 support total output current limits that
have user-adjustable response delay. The two sum current limits, fast and slow, allow you to permit high
maximum output current for a shorter period of time and lower output current for a longer period. The response
delay for the limiting mechanisms is also adjustable. These mechanisms do not restrict the maximum output
current until the current has exceeded a threshold for the response delay time. For example, suppose the device
is configured with a Fast Sum OC limit of 250A, a response delay of 50µs, and a shutdown response type. Next,
suppose a 300A load is placed on the regulator. 300A is supplied to the load for 50µs, and the device shuts down
as shown in Figure 24 on page 31.
Figure 21. OCP Functional Diagram
Figure 22. Peak OC Operation
Figure 23. Peak UC Operation



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