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XRT86VL38IB484 Datasheet(PDF) 91 Page - Exar Corporation |
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XRT86VL38IB484 Datasheet(HTML) 91 Page - Exar Corporation |
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91 / 180 page ![]() PRELIMINARY XRT86VL38 86 REV. P1.0.9 OCTAL T1/E1/J1 FRAMER/LIU COMBO - E1 REGISTER DESCRIPTION NOTE: The default value for register address 0xn340 = 0x01, 0xn341-0xn34F = 0xD0, 0xn350 = 0xB3, 0xn351-0xn35F = 0xD0 1 TxSIGSRC[1] R/W See Note Channel signaling control These bits determine the source for signaling information. The table below presents the different sources for signaling information corre- sponding to different settings of these two bits. 0 TxSIGSRC[0] R/W See Note TABLE 67: TRANSMIT SIGNALING CONTROL REGISTER 0-31 (TSCR 0-31) HEX ADDRESS: 0Xn340 TO 0XN35F BIT FUNCTION TYPE DEFAULT DESCRIPTION-OPERATION TXSIGSRC[1:0] SIGNALING SOURCE SELECTED 00 Signaling data is inserted from input PCM data (TxSERn pin) 01 Signaling data is inserted from this register (TSCRs). 10 Signaling data is inserted from the transmit Overhead input pin (TxOH_n) if XRT86VL38 is configured in the base rate configuration and if the Transmit Signaling Interface bit is disabled. (i.e. TxMUXEN bit = 0, TxI- MODE[1:0] = 00, and TxFr2048 bit = 0 in the Transmit Interface Control Register (TICR) Register 0xn120). If the Transmit Signaling Interface bit is enabled (i.e. TxFr2048 bit = 1 in the Trans- mit Interface Control Register (TICR) Regis- ter 0xn120), signaling data will be inserted from the Transmit Signaling input pin (TxSIG_n) 11 No signaling data is inserted into the input PCM data. Setting these two bits to ‘11’ will configure the xyxx bits only, where x bits are inserted from this register (TSCR) and y bit reflects the alarm condition. |
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