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74HC4046 Datasheet(PDF) 13 Page - NXP Semiconductors |
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74HC4046 Datasheet(HTML) 13 Page - NXP Semiconductors |
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13 / 34 page ![]() 1997 Nov 25 13 Philips Semiconductors Product specification Phase-locked-loop with VCO 74HC/HCT4046A AC CHARACTERISTICS FOR 74HC Phase comparator section GND = 0 V; tr =tf = 6 ns; CL = 50 pF SYMBOL PARAMETER Tamb (°C) UNIT TEST CONDITIONS 74HC VCC (V) OTHER +25 −40 to +85 −40 to +125 min. typ. max. min. max. min. max. tPHL/ tPLH propagation delay SIGIN, COMPIN to PC1OUT 63 200 250 300 ns 2.0 Fig.16 23 40 50 60 4.5 18 34 43 51 6.0 tPHL/ tPLH propagation delay SIGIN, COMPIN to PCPOUT 96 340 425 510 ns 2.0 Fig.16 35 68 85 102 4.5 28 58 72 87 6.0 tPHL/ tPLH propagation delay SIGIN, COMPIN to PC3OUT 77 270 340 405 ns 2.0 Fig.16 28 54 68 81 4.5 22 46 58 69 6.0 tPZH/ tPZL 3-state output enable time SIGIN, COMPIN to PC2OUT 83 280 350 420 ns 2.0 Fig.17 30 56 70 84 4.5 24 48 60 71 6.0 tPHZ/ tPLZ 3-state output disable time SIGIN, COMPIN to PC2OUT 99 325 405 490 ns 2.0 Fig.17 36 65 81 98 4.5 29 55 69 83 6.0 tTHL/ tTLH output transition time 19 75 95 110 ns 2.0 Fig.16 7 15 19 22 4.5 6 13 16 19 6.0 VI(p-p) AC coupled input sensitivity (peak-to-peak value) at SIGIN or COMPIN 9 mV 2.0 fi = 1 MHz 11 3.0 15 4.5 33 6.0 |
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