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HCT652 Datasheet(PDF) 7 Page - NXP Semiconductors

Part # HCT652
Description  Octal bus transceiver/register; 3-state
PDF  10 Pages
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Manufacturer  PHILIPS [NXP Semiconductors]
Direct Link  http://www.nxp.com
Logo PHILIPS - NXP Semiconductors

HCT652 Datasheet(HTML) 7 Page - NXP Semiconductors

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September 1993
7
Philips Semiconductors
Product specification
Octal bus transceiver/register; 3-state
74HC/HCT652
DC CHARACTERISTICS FOR 74HCT
For the DC characteristics see
“74HC/HCT/HCU/HCMOS Logic Family Specifications”.
Output capability: bus driver
ICC category: MSI.
Note to the HCT types
The value of additional quiescent supply current (
∆ICC) for unit a load of 1 is given in the family specifications.
To determine
∆ICC per input, multiply this value by the unit load coefficient shown in the table below
AC CHARACTERISTICS FOR 74HCT
GND = 0 V; tr =tf = 6 ns; CL = 50 pF.
INPUT
UNIT LOAD COEFFICIENT
SAB, SBA
0.75
A0 to A7 and B0 to B7
0.75
CPAB, CPBA
1.50
OEAB
1.50
OEBA
1.50
INPUT
PARAMETER
Tamb (°C)
UNIT
TEST CONDITIONS
+25
−40 to +85
−40 to +125
VCC
(V)
WAVEFORMS
MIN. TYP. MAX.
MIN. MAX. MIN.
MAX.
tPHL/tPLH
propagation delay
An, Bn to Bn, An
−
16
27
−
34
−
41
ns
4.5
Fig.6
tPHL/tPLH
propagation delay
CPAB, CPBA to Bn, An
−
23
39
−
49
−
59
ns
4.5
Fig.7
tPHL/tPLH
propagation delay
SAB, SBA to Bn, An
−
27
46
−
55
−
66
ns
4.5
Fig.8
tPZH/tPZL
3-state output enable
time
OEAB, OEBA to An, Bn
−
18
33
−
41
−
50
ns
4.5
Fig.9
tPHZ/tPLZ
3-state output disable
time
OEAB, OEBA to An, Bn
−
16
35
−
44
−
53
ns
4.5
Fig.9
tTHL/tTLH
output transition time
−
512
−
15
−
18
ns
4.5
Fig.6, 8
tW
clock pulse width
HIGH or LOW
CPAB or CPBA
16
6
−
20
−
24
−
ns
4.5
Fig.7
tsu
set-up time
An, Bn to CPAB, CPBA
10
5
−
13
−
15
−
ns
4.5
Fig.7
th
hold time
An, Bn to CPAB, CPBA
5
−2
−
6
−
8
−
ns
4.5
Fig.7
fmax
maximum clock pulse
frequency
30
83
−
24
−
20
−
MHz
4.5
Fig.7



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