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74HC7404D Datasheet(PDF) 19 Page - NXP Semiconductors |
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74HC7404D Datasheet(HTML) 19 Page - NXP Semiconductors |
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19 / 28 page ![]() September 1993 19 Philips Semiconductors Product specification 5-Bit x 64-word FIFO register; 3-state 74HC/HCT7404 Fig.14 Waveforms showing hold and set-up times for Dn input to SI input. The shaded areas indicate when the input is permitted to change for predictable output performance. handbook, full pagewidth SI INPUT MGA657 VM (1) Dn INPUT t su t h VM (1) t su t h (1) HC : VM = 50%; VI = GND to VCC. HCT : VM = 1.3 V; VI = GND to 3 V. Fig.15 Waveforms showing SO input to Qn output propagation delays and output transition time. handbook, full pagewidth t THL t TLH t PLH MGA664 VM (1) SO INPUT Qn OUTPUT VM (1) t PHL (1) HC : VM = 50%; VI = GND to VCC. HCT : VM = 1.3 V; VI = GND to 3 V. Fig.16 Waveform showing the MR input to SI input removal time. handbook, halfpage MGA665 t rem SI INPUT MR INPUT VM (1) VM (1) (1) HC : VM = 50%; VI = GND to VCC. HCT : VM = 1.3 V; VI = GND to 3 V. |
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