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LPC2888 Datasheet(PDF) 9 Page - NXP Semiconductors |
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LPC2888 Datasheet(HTML) 9 Page - NXP Semiconductors |
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9 / 34 page ![]() LPC2880_LPC2888_1 © Koninklijke Philips Electronics N.V. 2006. All rights reserved. Preliminary data sheet Rev. 01 — 22 June 2006 9 of 34 Philips Semiconductors LPC2880; LPC2888 16/32-bit ARM microcontrollers with external memory interface A15/P0[31] A14 FO address bus for static memory; GPIO pins A16/P1[0] B14 A17/P1[1] C14 A18/P1[2] A13 A19/P1[3] B13 A20/P1[4] C13 BLS0/P1[12] A12 FO byte lane select for D[7:0], active LOW for static memory; GPIO pin BLS1/P1[13] B12 FO byte lane select for D[15:8], active LOW for static memory; GPIO pin CAS/P1[16] C10 FO column address strobe, active LOW for SDRAM; GPIO pin CKE/P1[9] B10 FO clock enable; active HIGH for SDRAM; GPIO pin DQM0/P1[10] C12 FO data mask output for D[7:0], active HIGH for SDRAM; GPIO pin DQM1/P1[11] A11 FO data mask output for D[15:8], active HIGH for SDRAM; GPIO pin DYCS/P1[8] B9 FO chip select, active LOW for SDRAM; GPIO pin MCLKO/P1[14] A10 FO clock for SDRAM and SyncFlash memory; GPIO pin OE/P1[18] A17 FO output enable, active LOW for static memory; GPIO pin RAS/P1[17] A9 FO row address strobe, active LOW for SDRAM; GPIO pin RPO/P1[19] B1 FO reset power down, active LOW for SyncFlash memory; GPIO pin STCS0/P1[5] C9 FO chip select, active LOW for static memory bank 0; GPIO pin STCS1/P1[5] A8 FO chip select, active LOW for static memory bank 1; GPIO pin STCS2/P1[5] B11 FO chip select, active LOW for static memory bank 2; GPIO pin WE/P1[15] C11 FO write enable, active LOW for SDRAM and static memory; GPIO pin GPIO and mode control MODE1/P2[2] K18 FI start up MODE PIN1 (pull down); 5 V tolerant GPIO pin MODE2/P2[3] J16 FI start up MODE PIN2 (pull down); 5 V tolerant GPIO pin P2[0] K16 FI 5 V tolerant GPIO pin P2[1] K17 FI 5 V tolerant GPIO pin I2C-bus interface SCL H16 I/O serial clock (input/open-drain output); 5 V tolerant pin SDA J17 I/O serial data (input/open-drain output); 5 V tolerant pin JTAG interface JTAG_SEL U4 I JTAG selection (pull-down); 5 V tolerant pin JTAG_TCK V4 I JTAG reset input (pull-down); 5 V tolerant pin JTAG_TDI T5 I JTAG data input (pull-up); 5 V tolerant pin JTAG_TMS U12 I JTAG mode select input (pull-up); 5 V tolerant pin JTAG_TRST T13 I JTAG reset input (pull-down); 5 V tolerant pin JTAG_TDO U13 O JTAG data output; 5 V tolerant pin Table 4. Pin description …continued Signal name Ball # Type[1] Description |
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