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74LVC257AD Datasheet(PDF) 2 Page - NXP Semiconductors |
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74LVC257AD Datasheet(HTML) 2 Page - NXP Semiconductors |
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2 / 10 page ![]() Philips Semiconductors Product specification 74LVC257A Quad 2-input multiplexer with 5 Volt tolerant inputs/outputs (3-State) 2 1998 Jul 29 853-2101 19802 FEATURES • Wide supply voltage range of 1.2 to 3.6 V • In accordance with JEDEC standard no. 8-1A • CMOS lower power consumption • Direct interface with TTL levels • Output drive capability 50 W transmission lines at 85°C • 5 Volt tolerant inputs/outputs, for interfacing with 5 Volt logic DESCRIPTION The 74LVC257A is a high-performance, low-power, low-voltage, Si-gate CMOS device and superior to most advanced CMOS compatible TTL families. Inputs can be driven from either 3.3V or 5.0V devices. In 3-State operation, outputs can handle 5V. This feature allows the use of these devices as translators in a mixed 3.3V/5V environment. The 74LVC257A is a quad 2-input multiplexer with 3-state outputs, which select 4 bits of data from two sources and are controlled by a common data select input (S). The data inputs from source 0 (1l0 to 4l0) are selected when input S is LOW and the data inputs from source 1 (1l1 to 4l1) are selected when S in HIGH. Data appears at the outputs (1Y to 4Y) in true (non-inverting) form from the selected inputs. The 74LVC257A is the logic implementation of a 4-pole, 2-position switch, where the position of the switch is determined by the logic levels applied to S. The outputs are forced to a high impedance OFF-state when OE is HIGH. QUICK REFERENCE DATA GND = 0 V; Tamb = 25°C; tr =tf ≤ 2.5 ns SYMBOL PARAMETER CONDITIONS TYPICAL UNIT tPHL/tPLH Propagation delay nl0, nl1 to nY S to nY CL = 50 pF; VCC = 3.3 V 3.9 3.5 ns CI Input capacitance 5.0 pF CPD Power dissipation capacitance per channel VI = GND to VCC1 30 pF NOTE: 1. CPD is used to determine the dynamic power dissipation (PD in µW) PD = CPD × VCC2 × fi ) (CL × VCC2 × fo) where: fi = input frequency in MHz; CL = output load capacitance in pF; fo = output frequency in MHz; VCC = supply voltage in V; (CL × VCC2 × fo) = sum of the outputs. ORDERING INFORMATION PACKAGES TEMPERATURE RANGE OUTSIDE NORTH AMERICA NORTH AMERICA PKG. DWG. # 16-Pin Plastic SO –40 °C to +85°C 74LVC257A D 74LVC257A D SOT109-1 16-Pin Plastic SSOP Type II –40 °C to +85°C 74LVC257A DB 74LVC257A DB SOT338-1 16-Pin Plastic TSSOP Type I –40 °C to +85°C 74LVC257A PW 74LVC257APW DH SOT403-1 PIN CONFIGURATION SV00636 1 2 3 4 5 6 S 1I0 1I1 IY 2l0 2l1 VCC OE 4l0 16 15 14 13 12 11 7 8 GND 3l1 3Y 10 9 2Y 4l1 4Y 3l0 LOGIC SYMBOL SV00637 1 S OE 2 1I0 2I0 3I0 4I0 11I 2I1 3I1 4I1 35 4 1Y 6 7 2Y 10 12 4Y 14 11 9 3Y 13 15 |
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