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74LVC544APW Datasheet(PDF) 7 Page - NXP Semiconductors

Part # 74LVC544APW
Description  Octal D-type registered transceiver, inverting 3-State
PDF  10 Pages
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Manufacturer  PHILIPS [NXP Semiconductors]
Direct Link  http://www.nxp.com
Logo PHILIPS - NXP Semiconductors

74LVC544APW Datasheet(HTML) 7 Page - NXP Semiconductors

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Philips Semiconductors
Product specification
74LVC544A
Octal D-type registered transceiver, inverting
(3-State)
1998 Jul 29
7
AC WAVEFORMS
VM = 1.5V at VCC w 2.7V
VM = 0.5V * VCC at VCC t 2.7V
VOL and VOH are the typical output voltage drop that occur with the
output load.
VX = VOL + 0.3V at VCC w 2.7V
VX = VOL + 0.1VCC at VCC < 2.7V
VY = VOH – 0.3V at VCC w 2.7V
VY = VOH – 0.1VCC at VCC < 2.7V
An, Bn
INPUT
VM
tPHL
tPLH
VOL
VI
VM
GND
VOH
Bn, An
OUTPUT
SV00737
Figure 1. Input (An, Bn) to output (Bn, An) propagation delays.
tw
tPHL
tPLH
LEXX INPUT
An, Bn
OUTPUT
VM
VM
VM
VM
VM
VI
GND
VOH
VOL
SV00738
Figure 2. Latch enable input (LEXX) pulse width, the latch
enable input to output (An, Bn) propagation delays.
tPLZ
tPZL
VI
OEXX, EXX
INPUT
GND
VCC
OUTPUT
LOW-to-OFF
OFF-to-LOW
VOL
VOH
OUTPUT
HIGH-to-OFF
OFF-to-HIGH
GND
outputs
enabled
outputs
enabled
outputs
disabled
tPHZ
VM
VM
VM
tPZH
VX
VY
SW00210
Figure 3. 3-State enable and disable times
VM
An, Bn
INPUT
VM
LEXX, EXX
INPUT
tSU
th
NOTE: The shaded areas indicate when the input is permitted to change
for predictable output performance.
tSU
th
VI
GND
VI
GND
SV00739
Figure 4. Data set-up and hold times for the (An, Bn) input to
the LEXX and EXX inputs
TEST CIRCUIT
PULSE
GENERATOR
VI
RT
D.U.T.
VO
CL
50pF
S1
2 x VCC
Open
GND
500
Ω
500
Ω
VCC
VI
t 2.7V
VCC
2.7V – 3.6V
2.7V
Test
S1
GND
tPLZ/tPZL
2 x VCC
tPHZ/tPZH
tPLH/tPHL
Open
SY00003
VCC
Figure 5. Load circuitry for switching times



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