9DBU0731 datasheet(1/18 Pages) RENESAS

Part #	9DBU0731

Description	7-Output 1.5V PCIe Gen1-2-3 Fanout Buffer

PDF	18 Pages

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Manufacturer	RENESAS [Renesas Technology Corp]

Direct Link	http://www.renesas.com

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DATASHEET

9DBU0731 MARCH 8, 2017

1

7-Output 1.5V PCIe Gen1-2-3 Fanout Buffer

9DBU0731

Description

The 9DBU0731 is a member of IDT's 1.5V Ultra-Low-Power

(ULP) PCIe family. The device has 7 output enables for clock

management, and 3 selectable SMBus addresses.

Recommended Application

1.5V PCIe Gen1-2-3 Fanout Buffer (FOB)

Output Features

• 7 – 1–167MHz Low-Power (LP) HCSL DIF pairs

Key Specifications

• DIF additive cycle-to-cycle jitter < 5ps

• DIF output-to-output skew < 60ps

• DIF additive phase jitter is < 300fs rms for PCIe Gen3

• DIF additive phase jitter < 350s rms for SGMII

Features/Benefits

• LP-HCSL outputs; save 14 resistors compared to standard

HCSL outputs

• 36mW typical power consumption; eliminates thermal

concerns

• Outputs can optionally be supplied from any voltage

between 1.05V and 1.5V; maximum power savings

• Spread Spectrum (SS) compatible; allows SS for EMI

reduction

• OE# pins for each output; support DIF power management

• HCSL-compatible differential input; can be driven by

common clock sources

• SMBus-selectable features; optimize signal integrity to

application

• slew rate for each output

• differential output amplitude

• Device contains default configuration; SMBus interface not

required for device operation

• 3.3V tolerant SMBus interface works with legacy controllers

• Three selectable SMBus addresses; multiple devices can

easily share an SMBus segment

• 5 × 5 mm 40-VFQFPN package; minimal board space

Block Diagram

CONTROL

LOGIC

^CKPWRGD_PD#

SDATA_3.3

vOE(6:0)#

SCLK_3.3

vSADR

CLK_IN

7

DIF6

`

DIF4

DIF3

DIF1

DIF0

CLK_IN#

DIF2

DIF5

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9DBU0731 Datasheet(PDF) 1 Page - Renesas Technology Corp

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