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ZL40293 Datasheet(PDF) 2 Page - Microsemi Corporation

Part # ZL40293
Description  20-Output PCIe Gen 1, 2 ,3, 4 and 5 Buffer with Ultra-Low Additive Jitter
PDF  29 Pages
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Manufacturer  MICROSEMI [Microsemi Corporation]
Direct Link  http://www.microsemi.com
Logo MICROSEMI - Microsemi Corporation

ZL40293 Datasheet(HTML) 2 Page - Microsemi Corporation

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Data Sheet
ZL40293
ZL40293
March 2019
© 2019 Microsemi Corporation
2
Table of Contents
Features..................................................................................................................................... 1
Applications................................................................................................................................ 1
Table of Contents ...................................................................................................................... 2
Pin Diagram ............................................................................................................................... 5
Pin Descriptions ......................................................................................................................... 6
Functional Description ............................................................................................................... 8
Clock Inputs ............................................................................................................................... 8
Clock Outputs ............................................................................................................................ 9
Termination of unused outputs ................................................................................................ 10
Power Supply Filtering............................................................................................................. 10
OE# and Output Enables (Control Register) ........................................................................... 10
OE# Assertion (Transition from ‘1’ to ‘0’) ................................................................................. 10
OE# De-
Assertion (Transition from ‘0’ to ‘1’) ........................................................................... 11
PWRGD / PWRDN# ................................................................................................................ 11
PWRDN# Assertion ................................................................................................................. 11
PWRGD Assertion ................................................................................................................... 11
Programming via SMBus ......................................................................................................... 13
SMBus Byte Read/Write .......................................................................................................... 13
SMBus Block Read/Write ........................................................................................................ 14
Register Map ........................................................................................................................... 16
AC and DC Electrical Characteristics ...................................................................................... 19
Absolute Maximum Ratings ..................................................................................................... 19
Current Consumption............................................................................................................... 19
DC Electrical Specification....................................................................................................... 20
Power Noise Tolerance ........................................................................................................... 20
PCIe Electrical Characteristics ................................................................................................ 21
Input Clock Requirements ....................................................................................................... 25
SMBus Electrical Characteristics............................................................................................. 26
Package Outline ...................................................................................................................... 28



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